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https://git.naxdy.org/Mirror/Ryujinx.git
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102 lines
2.6 KiB
C#
102 lines
2.6 KiB
C#
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using Ryujinx.Graphics.Memory;
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using System.Collections.Generic;
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using System.Collections.ObjectModel;
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namespace Ryujinx.Graphics
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{
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public class NvGpuEngineP2mf : INvGpuEngine
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{
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public int[] Registers { get; private set; }
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private NvGpu Gpu;
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private Dictionary<int, NvGpuMethod> Methods;
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private ReadOnlyCollection<int> DataBuffer;
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public NvGpuEngineP2mf(NvGpu Gpu)
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{
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this.Gpu = Gpu;
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Registers = new int[0x80];
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Methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
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{
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while (Count-- > 0)
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{
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Methods.Add(Meth, Method);
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Meth += Stride;
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}
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}
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AddMethod(0x6c, 1, 1, Execute);
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AddMethod(0x6d, 1, 1, PushData);
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}
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public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
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{
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Method(Vmm, PBEntry);
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}
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else
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{
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WriteRegister(PBEntry);
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}
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}
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private void Execute(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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//TODO: Some registers and copy modes are still not implemented.
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int Control = PBEntry.Arguments[0];
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long DstAddress = MakeInt64From2xInt32(NvGpuEngineP2mfReg.DstAddress);
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int LineLengthIn = ReadRegister(NvGpuEngineP2mfReg.LineLengthIn);
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DataBuffer = null;
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Gpu.Fifo.Step();
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for (int Offset = 0; Offset < LineLengthIn; Offset += 4)
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{
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Vmm.WriteInt32(DstAddress + Offset, DataBuffer[Offset >> 2]);
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}
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}
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private void PushData(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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DataBuffer = PBEntry.Arguments;
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}
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private long MakeInt64From2xInt32(NvGpuEngineP2mfReg Reg)
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{
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return
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(long)Registers[(int)Reg + 0] << 32 |
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(uint)Registers[(int)Reg + 1];
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}
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private void WriteRegister(NvGpuPBEntry PBEntry)
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{
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int ArgsCount = PBEntry.Arguments.Count;
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if (ArgsCount > 0)
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{
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Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
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}
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}
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private int ReadRegister(NvGpuEngineP2mfReg Reg)
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{
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return Registers[(int)Reg];
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}
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private void WriteRegister(NvGpuEngineP2mfReg Reg, int Value)
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{
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Registers[(int)Reg] = Value;
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}
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}
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}
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