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using Ryujinx.Memory ;
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using Ryujinx.Memory.Range ;
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using System ;
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using System.Collections.Generic ;
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using System.Runtime.CompilerServices ;
using System.Runtime.InteropServices ;
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namespace Ryujinx.Graphics.Gpu.Memory
{
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/// <summary>
/// GPU memory manager.
/// </summary>
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public class MemoryManager : IWritableBlock
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{
private const int PtLvl0Bits = 14 ;
private const int PtLvl1Bits = 14 ;
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public const int PtPageBits = 12 ;
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private const ulong PtLvl0Size = 1 UL < < PtLvl0Bits ;
private const ulong PtLvl1Size = 1 UL < < PtLvl1Bits ;
public const ulong PageSize = 1 UL < < PtPageBits ;
private const ulong PtLvl0Mask = PtLvl0Size - 1 ;
private const ulong PtLvl1Mask = PtLvl1Size - 1 ;
public const ulong PageMask = PageSize - 1 ;
private const int PtLvl0Bit = PtPageBits + PtLvl1Bits ;
private const int PtLvl1Bit = PtPageBits ;
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private const int AddressSpaceBits = PtPageBits + PtLvl1Bits + PtLvl0Bits ;
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public const ulong PteUnmapped = 0xffffffff _ffffffff ;
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private readonly ulong [ ] [ ] _pageTable ;
public event EventHandler < UnmapEventArgs > MemoryUnmapped ;
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/// <summary>
/// Physical memory where the virtual memory is mapped into.
/// </summary>
internal PhysicalMemory Physical { get ; }
/// <summary>
/// Cache of GPU counters.
/// </summary>
internal CounterCache CounterCache { get ; }
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/// <summary>
/// Creates a new instance of the GPU memory manager.
/// </summary>
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/// <param name="physicalMemory">Physical memory that this memory manager will map into</param>
internal MemoryManager ( PhysicalMemory physicalMemory )
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{
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Physical = physicalMemory ;
CounterCache = new CounterCache ( ) ;
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_pageTable = new ulong [ PtLvl0Size ] [ ] ;
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MemoryUnmapped + = Physical . TextureCache . MemoryUnmappedHandler ;
MemoryUnmapped + = Physical . BufferCache . MemoryUnmappedHandler ;
MemoryUnmapped + = CounterCache . MemoryUnmappedHandler ;
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}
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/// <summary>
/// Reads data from GPU mapped memory.
/// </summary>
/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="va">GPU virtual address where the data is located</param>
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/// <param name="tracked">True if read tracking is triggered on the memory region</param>
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/// <returns>The data at the specified memory location</returns>
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public T Read < T > ( ulong va , bool tracked = false ) where T : unmanaged
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{
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int size = Unsafe . SizeOf < T > ( ) ;
if ( IsContiguous ( va , size ) )
{
ulong address = Translate ( va ) ;
if ( tracked )
{
return Physical . ReadTracked < T > ( address ) ;
}
else
{
return Physical . Read < T > ( address ) ;
}
}
else
{
Span < byte > data = new byte [ size ] ;
ReadImpl ( va , data , tracked ) ;
return MemoryMarshal . Cast < byte , T > ( data ) [ 0 ] ;
}
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}
/// <summary>
/// Gets a read-only span of data from GPU mapped memory.
/// </summary>
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/// <param name="va">GPU virtual address where the data is located</param>
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/// <param name="size">Size of the data</param>
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/// <param name="tracked">True if read tracking is triggered on the span</param>
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/// <returns>The span of the data at the specified memory location</returns>
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public ReadOnlySpan < byte > GetSpan ( ulong va , int size , bool tracked = false )
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{
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if ( IsContiguous ( va , size ) )
{
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return Physical . GetSpan ( Translate ( va ) , size , tracked ) ;
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}
else
{
Span < byte > data = new byte [ size ] ;
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ReadImpl ( va , data , tracked ) ;
return data ;
}
}
/// <summary>
/// Reads data from a possibly non-contiguous region of GPU mapped memory.
/// </summary>
/// <param name="va">GPU virtual address of the data</param>
/// <param name="data">Span to write the read data into</param>
/// <param name="tracked">True to enable write tracking on read, false otherwise</param>
private void ReadImpl ( ulong va , Span < byte > data , bool tracked )
{
if ( data . Length = = 0 )
{
return ;
}
int offset = 0 , size ;
if ( ( va & PageMask ) ! = 0 )
{
ulong pa = Translate ( va ) ;
size = Math . Min ( data . Length , ( int ) PageSize - ( int ) ( va & PageMask ) ) ;
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Physical . GetSpan ( pa , size , tracked ) . CopyTo ( data . Slice ( 0 , size ) ) ;
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offset + = size ;
}
for ( ; offset < data . Length ; offset + = size )
{
ulong pa = Translate ( va + ( ulong ) offset ) ;
size = Math . Min ( data . Length - offset , ( int ) PageSize ) ;
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Physical . GetSpan ( pa , size , tracked ) . CopyTo ( data . Slice ( offset , size ) ) ;
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}
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}
/// <summary>
/// Gets a writable region from GPU mapped memory.
/// </summary>
/// <param name="address">Start address of the range</param>
/// <param name="size">Size in bytes to be range</param>
/// <returns>A writable region with the data at the specified memory location</returns>
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public WritableRegion GetWritableRegion ( ulong va , int size )
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{
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if ( IsContiguous ( va , size ) )
{
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return Physical . GetWritableRegion ( Translate ( va ) , size ) ;
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}
else
{
Memory < byte > memory = new byte [ size ] ;
GetSpan ( va , size ) . CopyTo ( memory . Span ) ;
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return new WritableRegion ( this , va , memory ) ;
}
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}
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/// <summary>
/// Writes data to GPU mapped memory.
/// </summary>
/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="va">GPU virtual address to write the value into</param>
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/// <param name="value">The value to be written</param>
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public void Write < T > ( ulong va , T value ) where T : unmanaged
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{
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Write ( va , MemoryMarshal . Cast < T , byte > ( MemoryMarshal . CreateSpan ( ref value , 1 ) ) ) ;
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}
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/// <summary>
/// Writes data to GPU mapped memory.
/// </summary>
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/// <param name="va">GPU virtual address to write the data into</param>
/// <param name="data">The data to be written</param>
public void Write ( ulong va , ReadOnlySpan < byte > data )
{
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WriteImpl ( va , data , Physical . Write ) ;
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}
/// <summary>
/// Writes data to GPU mapped memory without write tracking.
/// </summary>
/// <param name="va">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void WriteUntracked ( ulong va , ReadOnlySpan < byte > data )
{
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WriteImpl ( va , data , Physical . WriteUntracked ) ;
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}
private delegate void WriteCallback ( ulong address , ReadOnlySpan < byte > data ) ;
/// <summary>
/// Writes data to possibly non-contiguous GPU mapped memory.
/// </summary>
/// <param name="va">GPU virtual address of the region to write into</param>
/// <param name="data">Data to be written</param>
/// <param name="writeCallback">Write callback</param>
private void WriteImpl ( ulong va , ReadOnlySpan < byte > data , WriteCallback writeCallback )
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{
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if ( IsContiguous ( va , data . Length ) )
{
writeCallback ( Translate ( va ) , data ) ;
}
else
{
int offset = 0 , size ;
if ( ( va & PageMask ) ! = 0 )
{
ulong pa = Translate ( va ) ;
size = Math . Min ( data . Length , ( int ) PageSize - ( int ) ( va & PageMask ) ) ;
writeCallback ( pa , data . Slice ( 0 , size ) ) ;
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offset + = size ;
}
for ( ; offset < data . Length ; offset + = size )
{
ulong pa = Translate ( va + ( ulong ) offset ) ;
size = Math . Min ( data . Length - offset , ( int ) PageSize ) ;
writeCallback ( pa , data . Slice ( offset , size ) ) ;
}
}
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}
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/// <summary>
/// Maps a given range of pages to the specified CPU virtual address.
/// </summary>
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/// <remarks>
/// All addresses and sizes must be page aligned.
/// </remarks>
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/// <param name="pa">CPU virtual address to map into</param>
/// <param name="va">GPU virtual address to be mapped</param>
/// <param name="size">Size in bytes of the mapping</param>
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public void Map ( ulong pa , ulong va , ulong size )
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{
lock ( _pageTable )
{
Memory Read/Write Tracking using Region Handles (#1272)
* WIP Range Tracking
- Texture invalidation seems to have large problems
- Buffer/Pool invalidation may have problems
- Mirror memory tracking puts an additional `add` in compiled code, we likely just want to make HLE access slower if this is the final solution.
- Native project is in the messiest possible location.
- [HACK] JIT memory access always uses native "fast" path
- [HACK] Trying some things with texture invalidation and views.
It works :)
Still a few hacks, messy things, slow things
More work in progress stuff (also move to memory project)
Quite a bit faster now.
- Unmapping GPU VA and CPU VA will now correctly update write tracking regions, and invalidate textures for the former.
- The Virtual range list is now non-overlapping like the physical one.
- Fixed some bugs where regions could leak.
- Introduced a weird bug that I still need to track down (consistent invalid buffer in MK8 ribbon road)
Move some stuff.
I think we'll eventually just put the dll and so for this in a nuget package.
Fix rebase.
[WIP] MultiRegionHandle variable size ranges
- Avoid reprotecting regions that change often (needs some tweaking)
- There's still a bug in buffers, somehow.
- Might want different api for minimum granularity
Fix rebase issue
Commit everything needed for software only tracking.
Remove native components.
Remove more native stuff.
Cleanup
Use a separate window for the background context, update opentk. (fixes linux)
Some experimental changes
Should get things working up to scratch - still need to try some things with flush/modification and res scale.
Include address with the region action.
Initial work to make range tracking work
Still a ton of bugs
Fix some issues with the new stuff.
* Fix texture flush instability
There's still some weird behaviour, but it's much improved without this. (textures with cpu modified data were flushing over it)
* Find the destination texture for Buffer->Texture full copy
Greatly improves performance for nvdec videos (with range tracking)
* Further improve texture tracking
* Disable Memory Tracking for view parents
This is a temporary approach to better match behaviour on master (where invalidations would be soaked up by views, rather than trigger twice)
The assumption is that when views are created to a texture, they will cover all of its data anyways. Of course, this can easily be improved in future.
* Introduce some tracking tests.
WIP
* Complete base tests.
* Add more tests for multiregion, fix existing test.
* Cleanup Part 1
* Remove unnecessary code from memory tracking
* Fix some inconsistencies with 3D texture rule.
* Add dispose tests.
* Use a background thread for the background context.
Rather than setting and unsetting a context as current, doing the work on a dedicated thread with signals seems to be a bit faster.
Also nerf the multithreading test a bit.
* Copy to texture with matching alignment
This extends the copy to work for some videos with unusual size, such as tutorial videos in SMO. It will only occur if the destination texture already exists at XCount size.
* Track reads for buffer copies. Synchronize new buffers before copying overlaps.
* Remove old texture flushing mechanisms.
Range tracking all the way, baby.
* Wake the background thread when disposing.
Avoids a deadlock when games are closed.
* Address Feedback 1
* Separate TextureCopy instance for background thread
Also `BackgroundContextWorker.InBackground` for a more sensible idenfifier for if we're in a background thread.
* Add missing XML docs.
* Address Feedback
* Maybe I should start drinking coffee.
* Some more feedback.
* Remove flush warning, Refocus window after making background context
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MemoryUnmapped ? . Invoke ( this , new UnmapEventArgs ( va , size ) ) ;
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for ( ulong offset = 0 ; offset < size ; offset + = PageSize )
{
SetPte ( va + offset , pa + offset ) ;
}
}
}
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/// <summary>
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/// Unmaps a given range of pages at the specified GPU virtual memory region.
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/// </summary>
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/// <param name="va">GPU virtual address to unmap</param>
/// <param name="size">Size in bytes of the region being unmapped</param>
public void Unmap ( ulong va , ulong size )
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{
lock ( _pageTable )
{
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// Event handlers are not expected to be thread safe.
MemoryUnmapped ? . Invoke ( this , new UnmapEventArgs ( va , size ) ) ;
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for ( ulong offset = 0 ; offset < size ; offset + = PageSize )
{
SetPte ( va + offset , PteUnmapped ) ;
}
}
}
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/// <summary>
/// Checks if a region of GPU mapped memory is contiguous.
/// </summary>
/// <param name="va">GPU virtual address of the region</param>
/// <param name="size">Size of the region</param>
/// <returns>True if the region is contiguous, false otherwise</returns>
[MethodImpl(MethodImplOptions.AggressiveInlining)]
private bool IsContiguous ( ulong va , int size )
{
if ( ! ValidateAddress ( va ) | | GetPte ( va ) = = PteUnmapped )
{
return false ;
}
ulong endVa = ( va + ( ulong ) size + PageMask ) & ~ PageMask ;
va & = ~ PageMask ;
int pages = ( int ) ( ( endVa - va ) / PageSize ) ;
for ( int page = 0 ; page < pages - 1 ; page + + )
{
if ( ! ValidateAddress ( va + PageSize ) | | GetPte ( va + PageSize ) = = PteUnmapped )
{
return false ;
}
if ( Translate ( va ) + PageSize ! = Translate ( va + PageSize ) )
{
return false ;
}
va + = PageSize ;
}
return true ;
}
/// <summary>
/// Gets the physical regions that make up the given virtual address region.
/// </summary>
/// <param name="va">Virtual address of the range</param>
/// <param name="size">Size of the range</param>
/// <returns>Multi-range with the physical regions</returns>
/// <exception cref="InvalidMemoryRegionException">The memory region specified by <paramref name="va"/> and <paramref name="size"/> is not fully mapped</exception>
public MultiRange GetPhysicalRegions ( ulong va , ulong size )
{
if ( IsContiguous ( va , ( int ) size ) )
{
return new MultiRange ( Translate ( va ) , size ) ;
}
if ( ! IsMapped ( va ) )
{
throw new InvalidMemoryRegionException ( $"The specified GPU virtual address 0x{va:X} is not mapped." ) ;
}
ulong regionStart = Translate ( va ) ;
ulong regionSize = Math . Min ( size , PageSize - ( va & PageMask ) ) ;
ulong endVa = va + size ;
ulong endVaRounded = ( endVa + PageMask ) & ~ PageMask ;
va & = ~ PageMask ;
int pages = ( int ) ( ( endVaRounded - va ) / PageSize ) ;
var regions = new List < MemoryRange > ( ) ;
for ( int page = 0 ; page < pages - 1 ; page + + )
{
if ( ! IsMapped ( va + PageSize ) )
{
throw new InvalidMemoryRegionException ( $"The specified GPU virtual memory range 0x{va:X}..0x{(va + size):X} is not fully mapped." ) ;
}
ulong newPa = Translate ( va + PageSize ) ;
if ( Translate ( va ) + PageSize ! = newPa )
{
regions . Add ( new MemoryRange ( regionStart , regionSize ) ) ;
regionStart = newPa ;
regionSize = 0 ;
}
va + = PageSize ;
regionSize + = Math . Min ( endVa - va , PageSize ) ;
}
regions . Add ( new MemoryRange ( regionStart , regionSize ) ) ;
return new MultiRange ( regions . ToArray ( ) ) ;
}
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/// <summary>
/// Checks if a given GPU virtual memory range is mapped to the same physical regions
/// as the specified physical memory multi-range.
/// </summary>
/// <param name="range">Physical memory multi-range</param>
/// <param name="va">GPU virtual memory address</param>
/// <returns>True if the virtual memory region is mapped into the specified physical one, false otherwise</returns>
public bool CompareRange ( MultiRange range , ulong va )
{
va & = ~ PageMask ;
for ( int i = 0 ; i < range . Count ; i + + )
{
MemoryRange currentRange = range . GetSubRange ( i ) ;
ulong address = currentRange . Address & ~ PageMask ;
ulong endAddress = ( currentRange . EndAddress + PageMask ) & ~ PageMask ;
while ( address < endAddress )
{
if ( Translate ( va ) ! = address )
{
return false ;
}
va + = PageSize ;
address + = PageSize ;
}
}
return true ;
}
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/// <summary>
/// Validates a GPU virtual address.
/// </summary>
/// <param name="va">Address to validate</param>
/// <returns>True if the address is valid, false otherwise</returns>
private static bool ValidateAddress ( ulong va )
{
return va < ( 1 UL < < AddressSpaceBits ) ;
}
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/// <summary>
/// Checks if a given page is mapped.
/// </summary>
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/// <param name="va">GPU virtual address of the page to check</param>
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/// <returns>True if the page is mapped, false otherwise</returns>
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public bool IsMapped ( ulong va )
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{
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return Translate ( va ) ! = PteUnmapped ;
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}
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/// <summary>
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/// Translates a GPU virtual address to a CPU virtual address.
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/// </summary>
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/// <param name="va">GPU virtual address to be translated</param>
/// <returns>CPU virtual address, or <see cref="PteUnmapped"/> if unmapped</returns>
public ulong Translate ( ulong va )
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{
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if ( ! ValidateAddress ( va ) )
{
return PteUnmapped ;
}
ulong baseAddress = GetPte ( va ) ;
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if ( baseAddress = = PteUnmapped )
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{
return PteUnmapped ;
}
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return baseAddress + ( va & PageMask ) ;
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}
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/// <summary>
/// Gets the Page Table entry for a given GPU virtual address.
/// </summary>
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/// <param name="va">GPU virtual address</param>
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/// <returns>Page table entry (CPU virtual address)</returns>
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private ulong GetPte ( ulong va )
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{
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ulong l0 = ( va > > PtLvl0Bit ) & PtLvl0Mask ;
ulong l1 = ( va > > PtLvl1Bit ) & PtLvl1Mask ;
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if ( _pageTable [ l0 ] = = null )
{
return PteUnmapped ;
}
return _pageTable [ l0 ] [ l1 ] ;
}
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/// <summary>
/// Sets a Page Table entry at a given GPU virtual address.
/// </summary>
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/// <param name="va">GPU virtual address</param>
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/// <param name="pte">Page table entry (CPU virtual address)</param>
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private void SetPte ( ulong va , ulong pte )
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{
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ulong l0 = ( va > > PtLvl0Bit ) & PtLvl0Mask ;
ulong l1 = ( va > > PtLvl1Bit ) & PtLvl1Mask ;
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if ( _pageTable [ l0 ] = = null )
{
_pageTable [ l0 ] = new ulong [ PtLvl1Size ] ;
for ( ulong index = 0 ; index < PtLvl1Size ; index + + )
{
_pageTable [ l0 ] [ index ] = PteUnmapped ;
}
}
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_pageTable [ l0 ] [ l1 ] = pte ;
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}
}
}