diff --git a/Ryujinx.Graphics.Shader/CodeGen/Spirv/SpirvGenerator.cs b/Ryujinx.Graphics.Shader/CodeGen/Spirv/SpirvGenerator.cs
index 37b6be7f5..895b37b53 100644
--- a/Ryujinx.Graphics.Shader/CodeGen/Spirv/SpirvGenerator.cs
+++ b/Ryujinx.Graphics.Shader/CodeGen/Spirv/SpirvGenerator.cs
@@ -199,7 +199,8 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
                         context.AddExecutionMode(spvFunc, ExecutionMode.EarlyFragmentTests);
                     }
 
-                    if (context.Config.GpuAccessor.QueryHostSupportsFragmentShaderInterlock())
+                    if ((info.HelperFunctionsMask & HelperFunctionsMask.FSI) != 0 && 
+                        context.Config.GpuAccessor.QueryHostSupportsFragmentShaderInterlock())
                     {
                         context.AddExecutionMode(spvFunc, ExecutionMode.PixelInterlockOrderedEXT);
                     }
diff --git a/Ryujinx.Graphics.Shader/StructuredIr/HelperFunctionsMask.cs b/Ryujinx.Graphics.Shader/StructuredIr/HelperFunctionsMask.cs
index 3dfd025b5..d45f8d4ee 100644
--- a/Ryujinx.Graphics.Shader/StructuredIr/HelperFunctionsMask.cs
+++ b/Ryujinx.Graphics.Shader/StructuredIr/HelperFunctionsMask.cs
@@ -15,6 +15,7 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
         ShuffleXor             = 1 << 7,
         StoreSharedSmallInt    = 1 << 8,
         StoreStorageSmallInt   = 1 << 9,
-        SwizzleAdd             = 1 << 10
+        SwizzleAdd             = 1 << 10,
+        FSI                    = 1 << 11
     }
 }
\ No newline at end of file
diff --git a/Ryujinx.Graphics.Shader/StructuredIr/StructuredProgram.cs b/Ryujinx.Graphics.Shader/StructuredIr/StructuredProgram.cs
index 0ec56441c..7e15384b2 100644
--- a/Ryujinx.Graphics.Shader/StructuredIr/StructuredProgram.cs
+++ b/Ryujinx.Graphics.Shader/StructuredIr/StructuredProgram.cs
@@ -244,6 +244,10 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
                 case Instruction.SwizzleAdd:
                     context.Info.HelperFunctionsMask |= HelperFunctionsMask.SwizzleAdd;
                     break;
+                case Instruction.FSIBegin:
+                case Instruction.FSIEnd:
+                    context.Info.HelperFunctionsMask |= HelperFunctionsMask.FSI;
+                    break;
             }
         }