mirror of
https://git.naxdy.org/Mirror/Ryujinx.git
synced 2025-01-08 20:02:39 +00:00
Convert misc CPU tests to xUnit
This commit is contained in:
TSR Berry
parent
b16a539468
commit
7acf80b93d
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@ -1,5 +1,8 @@
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// #define Misc
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#define Misc
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using ARMeilleure.State;
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using System;
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using System.Collections.Generic;
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using Xunit;
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namespace Ryujinx.Tests.Cpu
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@ -43,7 +46,7 @@ namespace Ryujinx.Tests.Cpu
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for (int cnt = 1; cnt <= RndCnt; cnt++)
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{
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ulong grbg = TestContext.CurrentContext.Random.NextUInt();
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ulong grbg = Random.Shared.NextUInt();
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ulong rnd1 = GenNormalS();
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ulong rnd2 = GenSubnormalS();
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@ -60,15 +63,44 @@ namespace Ryujinx.Tests.Cpu
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private static readonly bool _noNaNs = false;
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#region "AluImm & Csel"
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[Test, Pairwise]
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public void Adds_Csinc_64bit([Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
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[Values(0u, 4095u)] uint imm,
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[Values(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u)] uint cond) // GT, LE>
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private static readonly ulong[] _testDataXn =
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{
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0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul,
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};
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private static readonly uint[] _testDataWn =
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{
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0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu,
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};
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private static readonly uint[] _testDataImm =
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{
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0u, 4095u,
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};
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private static readonly uint[] _testDataShift =
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{
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0b00u, 0b01u,
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};
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private static readonly uint[] _testDataCond =
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{
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0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u, // GT, LE>
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};
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public static readonly MatrixTheoryData<ulong, uint, uint, uint> TestMatrixData_64bit = new(_testDataXn, _testDataImm, _testDataShift, _testDataCond);
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public static readonly MatrixTheoryData<uint, uint, uint, uint> TestMatrixData_32bit = new(_testDataWn, _testDataImm, _testDataShift, _testDataCond);
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public static readonly RangeTheoryData<uint> TestRangeData = new(0u, 92u, 1u);
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[Theory]
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[MemberData(nameof(TestMatrixData_64bit))]
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public void Adds_Csinc_64bit(ulong xn, uint imm, uint shift, uint cond)
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{
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uint opCmn = 0xB100001F; // ADDS X31, X0, #0, LSL #0 -> CMN X0, #0, LSL #0
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uint opCset = 0x9A9F07E0; // CSINC X0, X31, X31, EQ -> CSET X0, NE
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@ -85,15 +117,9 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Adds_Csinc_32bit([Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint wn,
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[Values(0u, 4095u)] uint imm,
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[Values(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u)] uint cond) // GT, LE>
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[Theory]
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[MemberData(nameof(TestMatrixData_32bit))]
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public void Adds_Csinc_32bit(uint wn, uint imm, uint shift, uint cond)
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{
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uint opCmn = 0x3100001F; // ADDS W31, W0, #0, LSL #0 -> CMN W0, #0, LSL #0
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uint opCset = 0x1A9F07E0; // CSINC W0, W31, W31, EQ -> CSET W0, NE
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@ -110,15 +136,9 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Subs_Csinc_64bit([Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
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[Values(0u, 4095u)] uint imm,
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[Values(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u)] uint cond) // GT, LE>
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[Theory]
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[MemberData(nameof(TestMatrixData_64bit))]
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public void Subs_Csinc_64bit(ulong xn, uint imm, uint shift, uint cond)
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{
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uint opCmp = 0xF100001F; // SUBS X31, X0, #0, LSL #0 -> CMP X0, #0, LSL #0
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uint opCset = 0x9A9F07E0; // CSINC X0, X31, X31, EQ -> CSET X0, NE
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@ -135,15 +155,9 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Subs_Csinc_32bit([Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint wn,
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[Values(0u, 4095u)] uint imm,
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[Values(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
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[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
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0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
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0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
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0b1100u, 0b1101u)] uint cond) // GT, LE>
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[Theory]
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[MemberData(nameof(TestMatrixData_32bit))]
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public void Subs_Csinc_32bit(uint wn, uint imm, uint shift, uint cond)
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{
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uint opCmp = 0x7100001F; // SUBS W31, W0, #0, LSL #0 -> CMP W0, #0, LSL #0
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uint opCset = 0x1A9F07E0; // CSINC W0, W31, W31, EQ -> CSET W0, NE
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@ -162,9 +176,9 @@ namespace Ryujinx.Tests.Cpu
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#endregion
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// Roots.
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[Explicit]
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[TestCase(0xFFFFFFFDu)]
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[TestCase(0x00000005u)]
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[Theory]
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[InlineData(0xFFFFFFFDu)]
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[InlineData(0x00000005u)]
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public void Misc1(uint a)
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{
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// ((a + 3) * (a - 5)) / ((a + 5) * (a - 3)) = 0
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@ -191,29 +205,29 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetX(0), Is.Zero);
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Assert.Equal(0ul, GetContext().GetX(0));
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}
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// 18 integer solutions.
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[Explicit]
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[TestCase(-20f, -5f)]
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[TestCase(-12f, -6f)]
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[TestCase(-12f, 3f)]
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[TestCase(-8f, -8f)]
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[TestCase(-6f, -12f)]
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[TestCase(-5f, -20f)]
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[TestCase(-4f, 2f)]
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[TestCase(-3f, 12f)]
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[TestCase(-2f, 4f)]
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[TestCase(2f, -4f)]
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[TestCase(3f, -12f)]
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[TestCase(4f, -2f)]
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[TestCase(5f, 20f)]
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[TestCase(6f, 12f)]
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[TestCase(8f, 8f)]
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[TestCase(12f, -3f)]
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[TestCase(12f, 6f)]
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[TestCase(20f, 5f)]
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[Theory]
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[InlineData(-20f, -5f)]
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[InlineData(-12f, -6f)]
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[InlineData(-12f, 3f)]
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[InlineData(-8f, -8f)]
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[InlineData(-6f, -12f)]
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[InlineData(-5f, -20f)]
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[InlineData(-4f, 2f)]
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[InlineData(-3f, 12f)]
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[InlineData(-2f, 4f)]
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[InlineData(2f, -4f)]
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[InlineData(3f, -12f)]
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[InlineData(4f, -2f)]
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[InlineData(5f, 20f)]
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[InlineData(6f, 12f)]
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[InlineData(8f, 8f)]
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[InlineData(12f, -3f)]
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[InlineData(12f, 6f)]
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[InlineData(20f, 5f)]
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public void Misc2(float a, float b)
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{
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// 1 / ((1 / a + 1 / b) ^ 2) = 16
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@ -238,29 +252,29 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetV(0).As<float>(), Is.EqualTo(16f));
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Assert.Equal(16f, GetContext().GetV(0).As<float>());
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}
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// 18 integer solutions.
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[Explicit]
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[TestCase(-20d, -5d)]
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[TestCase(-12d, -6d)]
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[TestCase(-12d, 3d)]
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[TestCase(-8d, -8d)]
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[TestCase(-6d, -12d)]
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[TestCase(-5d, -20d)]
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[TestCase(-4d, 2d)]
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[TestCase(-3d, 12d)]
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[TestCase(-2d, 4d)]
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[TestCase(2d, -4d)]
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[TestCase(3d, -12d)]
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[TestCase(4d, -2d)]
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[TestCase(5d, 20d)]
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[TestCase(6d, 12d)]
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[TestCase(8d, 8d)]
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[TestCase(12d, -3d)]
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[TestCase(12d, 6d)]
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[TestCase(20d, 5d)]
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[Theory]
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[InlineData(-20d, -5d)]
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[InlineData(-12d, -6d)]
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[InlineData(-12d, 3d)]
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[InlineData(-8d, -8d)]
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[InlineData(-6d, -12d)]
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[InlineData(-5d, -20d)]
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[InlineData(-4d, 2d)]
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[InlineData(-3d, 12d)]
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[InlineData(-2d, 4d)]
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[InlineData(2d, -4d)]
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[InlineData(3d, -12d)]
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[InlineData(4d, -2d)]
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[InlineData(5d, 20d)]
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[InlineData(6d, 12d)]
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[InlineData(8d, 8d)]
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[InlineData(12d, -3d)]
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[InlineData(12d, 6d)]
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[InlineData(20d, 5d)]
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public void Misc3(double a, double b)
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{
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// 1 / ((1 / a + 1 / b) ^ 2) = 16
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@ -285,11 +299,12 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetV(0).As<double>(), Is.EqualTo(16d));
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Assert.Equal(16d, GetContext().GetV(0).As<double>());
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}
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[Test, Ignore("The Tester supports only one return point.")]
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public void MiscF([Range(0u, 92u, 1u)] uint a)
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[Theory(Skip = "The Tester supports only one return point.")]
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[MemberData(nameof(TestRangeData))]
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public void MiscF(uint a)
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{
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static ulong Fn(uint n)
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{
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@ -352,11 +367,11 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetX(0), Is.EqualTo(Fn(a)));
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Assert.Equal(Fn(a), GetContext().GetX(0));
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}
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[Explicit]
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[Test]
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// This test used to be skipped unless explicitly executed
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[Fact]
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public void MiscR()
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{
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const ulong Result = 5;
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@ -374,7 +389,7 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetX(0), Is.EqualTo(Result));
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Assert.Equal(Result, GetContext().GetX(0));
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Reset();
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@ -391,57 +406,67 @@ namespace Ryujinx.Tests.Cpu
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Opcode(0xD65F03C0);
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ExecuteOpcodes();
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Assert.That(GetContext().GetX(0), Is.EqualTo(Result));
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Assert.Equal(Result, GetContext().GetX(0));
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}
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[Explicit]
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[TestCase(0ul)]
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[TestCase(1ul)]
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[TestCase(2ul)]
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[TestCase(42ul)]
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// This test used to be skipped unless explicitly executed
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[Theory]
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[InlineData(0ul)]
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[InlineData(1ul)]
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[InlineData(2ul)]
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[InlineData(42ul)]
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public void SanityCheck(ulong a)
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{
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uint opcode = 0xD503201F; // NOP
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ExecutionContext context = SingleOpcode(opcode, x0: a);
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Assert.That(context.GetX(0), Is.EqualTo(a));
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Assert.Equal(a, context.GetX(0));
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}
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[Explicit]
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[Test, Pairwise]
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public void Misc4([ValueSource(nameof(_1S_F_))] ulong a,
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[ValueSource(nameof(_1S_F_))] ulong b,
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[ValueSource(nameof(_1S_F_))] ulong c,
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[Values(0ul, 1ul, 2ul, 3ul)] ulong displacement)
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private static readonly ulong[] _testDataMisc4Displacement =
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{
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if (!BitConverter.IsLittleEndian)
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{
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Assert.Ignore();
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}
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0ul, 1ul, 2ul, 3ul,
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};
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public static readonly MatrixTheoryData<ulong, ulong, ulong, ulong> TestDataMisc4 = new(_1S_F_(), _1S_F_(), _1S_F_(), _testDataMisc4Displacement);
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// This test used to be skipped unless explicitly executed
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[SkippableTheory]
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[MemberData(nameof(TestDataMisc4))]
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public void Misc4(ulong a, ulong b, ulong c, ulong displacement)
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{
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Skip.IfNot(BitConverter.IsLittleEndian);
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byte[] data = new byte[1];
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for (ulong gapOffset = 0; gapOffset < displacement; gapOffset++)
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{
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SetWorkingMemory(gapOffset, TestContext.CurrentContext.Random.NextByte());
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Random.Shared.NextBytes(data);
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SetWorkingMemory(gapOffset, data[0]);
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}
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SetWorkingMemory(0x0 + displacement, BitConverter.GetBytes((uint)b));
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SetWorkingMemory(0x4 + displacement, BitConverter.GetBytes((uint)c));
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SetWorkingMemory(0x8 + displacement, TestContext.CurrentContext.Random.NextByte());
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SetWorkingMemory(0x9 + displacement, TestContext.CurrentContext.Random.NextByte());
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SetWorkingMemory(0xA + displacement, TestContext.CurrentContext.Random.NextByte());
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SetWorkingMemory(0xB + displacement, TestContext.CurrentContext.Random.NextByte());
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Random.Shared.NextBytes(data);
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SetWorkingMemory(0x8 + displacement, data[0]);
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Random.Shared.NextBytes(data);
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SetWorkingMemory(0x9 + displacement, data[0]);
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Random.Shared.NextBytes(data);
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SetWorkingMemory(0xA + displacement, data[0]);
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Random.Shared.NextBytes(data);
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SetWorkingMemory(0xB + displacement, data[0]);
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SetContext(
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x0: DataBaseAddress + displacement,
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v0: MakeVectorE0E1(a, TestContext.CurrentContext.Random.NextULong()),
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v1: MakeVectorE0E1(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong()),
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v2: MakeVectorE0E1(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong()),
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overflow: TestContext.CurrentContext.Random.NextBool(),
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carry: TestContext.CurrentContext.Random.NextBool(),
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zero: TestContext.CurrentContext.Random.NextBool(),
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negative: TestContext.CurrentContext.Random.NextBool());
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v0: MakeVectorE0E1(a, Random.Shared.NextULong()),
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v1: MakeVectorE0E1(Random.Shared.NextULong(), Random.Shared.NextULong()),
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v2: MakeVectorE0E1(Random.Shared.NextULong(), Random.Shared.NextULong()),
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overflow: Random.Shared.NextBool(),
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carry: Random.Shared.NextBool(),
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zero: Random.Shared.NextBool(),
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negative: Random.Shared.NextBool());
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Opcode(0xBD400001); // LDR S1, [X0,#0]
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Opcode(0xBD400402); // LDR S2, [X0,#4]
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@ -455,17 +480,20 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Explicit]
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[Test]
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public void Misc5([ValueSource(nameof(_1S_F_))] ulong a)
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public static readonly EnumerableTheoryData<ulong> TestDataMisc5 = new(_1S_F_());
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// This test used to be skipped unless explicitly executed
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[Theory]
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[MemberData(nameof(TestDataMisc5))]
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public void Misc5(ulong a)
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{
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SetContext(
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v0: MakeVectorE0E1(a, TestContext.CurrentContext.Random.NextULong()),
|
||||
v1: MakeVectorE0E1(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong()),
|
||||
overflow: TestContext.CurrentContext.Random.NextBool(),
|
||||
carry: TestContext.CurrentContext.Random.NextBool(),
|
||||
zero: TestContext.CurrentContext.Random.NextBool(),
|
||||
negative: TestContext.CurrentContext.Random.NextBool());
|
||||
v0: MakeVectorE0E1(a, Random.Shared.NextULong()),
|
||||
v1: MakeVectorE0E1(Random.Shared.NextULong(), Random.Shared.NextULong()),
|
||||
overflow: Random.Shared.NextBool(),
|
||||
carry: Random.Shared.NextBool(),
|
||||
zero: Random.Shared.NextBool(),
|
||||
negative: Random.Shared.NextBool());
|
||||
|
||||
Opcode(0x1E202008); // FCMP S0, #0.0
|
||||
Opcode(0x1E2E1001); // FMOV S1, #1.0
|
||||
|
|
|
|||
|
|
@ -1,5 +1,8 @@
|
|||
// #define Misc32
|
||||
#define Misc32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
|
|
@ -43,7 +46,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
|
|
@ -59,28 +62,33 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vmsr_Vcmp_Vmrs([ValueSource(nameof(_1S_F_))] ulong a,
|
||||
[ValueSource(nameof(_1S_F_))] ulong b,
|
||||
[Values] bool mode1,
|
||||
[Values] bool mode2,
|
||||
[Values] bool mode3)
|
||||
private static readonly bool[] _testData_bool =
|
||||
{
|
||||
false,
|
||||
true,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<ulong, ulong, bool, bool, bool> TestData = new(_1S_F_(), _1S_F_(), _testData_bool, _testData_bool, _testData_bool);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void Vmsr_Vcmp_Vmrs(ulong a, ulong b, bool mode1, bool mode2, bool mode3)
|
||||
{
|
||||
V128 v4 = MakeVectorE0(a);
|
||||
V128 v5 = MakeVectorE0(b);
|
||||
|
||||
uint r0 = mode1
|
||||
? TestContext.CurrentContext.Random.NextUInt(0xf) << 28
|
||||
: TestContext.CurrentContext.Random.NextUInt();
|
||||
? Random.Shared.NextUInt(0xf) << 28
|
||||
: Random.Shared.NextUInt();
|
||||
|
||||
bool v = mode3 && TestContext.CurrentContext.Random.NextBool();
|
||||
bool c = mode3 && TestContext.CurrentContext.Random.NextBool();
|
||||
bool z = mode3 && TestContext.CurrentContext.Random.NextBool();
|
||||
bool n = mode3 && TestContext.CurrentContext.Random.NextBool();
|
||||
bool v = mode3 && Random.Shared.NextBool();
|
||||
bool c = mode3 && Random.Shared.NextBool();
|
||||
bool z = mode3 && Random.Shared.NextBool();
|
||||
bool n = mode3 && Random.Shared.NextBool();
|
||||
|
||||
int fpscr = mode1
|
||||
? (int)TestContext.CurrentContext.Random.NextUInt()
|
||||
: (int)TestContext.CurrentContext.Random.NextUInt(0xf) << 28;
|
||||
? (int)Random.Shared.NextUInt()
|
||||
: (int)Random.Shared.NextUInt(0xf) << 28;
|
||||
|
||||
SetContext(r0: r0, v4: v4, v5: v5, overflow: v, carry: c, zero: z, negative: n, fpscr: fpscr);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue