mirror of
https://git.naxdy.org/Mirror/Ryujinx.git
synced 2025-01-07 16:33:05 +00:00
Convert CPU tests to xUnit
This commit is contained in:
TSR Berry
parent
4f8394416b
commit
8b2e3e4849
48 changed files with 6136 additions and 5298 deletions
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@ -6,12 +6,15 @@ using Ryujinx.Memory;
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using Ryujinx.Tests.Unicorn;
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using System;
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using Xunit;
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using Xunit.Abstractions;
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using MemoryPermission = Ryujinx.Tests.Unicorn.MemoryPermission;
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namespace Ryujinx.Tests.Cpu
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{
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public class CpuTest : IDisposable
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{
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private readonly ITestOutputHelper _testOutputHelper;
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protected static readonly ulong Size = MemoryBlock.GetPageSize();
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#pragma warning disable CA2211 // Non-constant fields should not be visible
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protected static ulong CodeBaseAddress = Size;
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@ -37,8 +40,9 @@ namespace Ryujinx.Tests.Cpu
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private bool _usingMemory;
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protected CpuTest()
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public CpuTest(ITestOutputHelper testOutputHelper)
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{
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_testOutputHelper = testOutputHelper;
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Setup();
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}
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@ -473,7 +477,7 @@ namespace Ryujinx.Tests.Cpu
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Assert.Equal(_unicornEmu.Q[0].GetFloat(3), _context.GetV(0).Extract<float>(3), 1f);
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});
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Console.WriteLine(fpTolerances);
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_testOutputHelper.WriteLine(fpTolerances.ToString());
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}
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else
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{
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@ -494,7 +498,7 @@ namespace Ryujinx.Tests.Cpu
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_unicornEmu.Q[0].GetDouble(1), 1d);
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});
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Console.WriteLine(fpTolerances);
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_testOutputHelper.WriteLine(fpTolerances.ToString());
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}
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else
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{
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@ -6,12 +6,15 @@ using Ryujinx.Memory;
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using Ryujinx.Tests.Unicorn;
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using System;
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using Xunit;
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using Xunit.Abstractions;
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using MemoryPermission = Ryujinx.Tests.Unicorn.MemoryPermission;
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namespace Ryujinx.Tests.Cpu
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{
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public class CpuTest32 : IDisposable
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{
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private readonly ITestOutputHelper _testOutputHelper;
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protected static readonly uint Size = (uint)MemoryBlock.GetPageSize();
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#pragma warning disable CA2211 // Non-constant fields should not be visible
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protected static uint CodeBaseAddress = Size;
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@ -31,8 +34,9 @@ namespace Ryujinx.Tests.Cpu
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private bool _usingMemory;
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public CpuTest32()
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public CpuTest32(ITestOutputHelper testOutputHelper)
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{
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_testOutputHelper = testOutputHelper;
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Setup();
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}
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@ -506,7 +510,7 @@ namespace Ryujinx.Tests.Cpu
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Assert.Equal(_unicornEmu.Q[0].GetFloat(3), _context.GetV(0).Extract<float>(3), 1f);
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});
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Console.WriteLine(fpTolerances);
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_testOutputHelper.WriteLine(fpTolerances.ToString());
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}
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else
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{
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@ -525,7 +529,7 @@ namespace Ryujinx.Tests.Cpu
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Assert.Equal(_unicornEmu.Q[0].GetDouble(1), _context.GetV(0).Extract<double>(1), 1d);
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});
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Console.WriteLine(fpTolerances);
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_testOutputHelper.WriteLine(fpTolerances.ToString());
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}
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else
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{
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@ -3,12 +3,17 @@
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using System;
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using System.Collections.Generic;
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using Xunit;
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using Xunit.Abstractions;
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namespace Ryujinx.Tests.Cpu
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{
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[Collection("Alu")]
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public sealed class CpuTestAlu : CpuTest
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{
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public CpuTestAlu(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
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{
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}
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#if Alu
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#region "Helper methods"
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@ -105,30 +110,11 @@ namespace Ryujinx.Tests.Cpu
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}
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#endregion
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private static readonly uint[] _testData_rd = { 0u, 31u };
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private static readonly uint[] _testData_rn = { 1u, 31u };
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private static readonly ulong[] _testData_xn =
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{
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0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul,
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};
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private static readonly uint[] _testData_wn =
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{
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0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu,
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};
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public static readonly MatrixTheoryData<uint, uint, ulong> TestData_CLS_x = new(_testData_rd, _testData_rn, GenLeadingSignsX());
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public static readonly MatrixTheoryData<uint, uint, uint> TestData_CLS_w = new(_testData_rd, _testData_rn, GenLeadingSignsW());
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public static readonly MatrixTheoryData<uint, uint, ulong> TestData_CLZ_x = new(_testData_rd, _testData_rn, GenLeadingZerosX());
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public static readonly MatrixTheoryData<uint, uint, uint> TestData_CLZ_w = new(_testData_rd, _testData_rn, GenLeadingZerosW());
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public static readonly MatrixTheoryData<uint, uint, ulong> TestData_64bit = new(_testData_rd, _testData_rn, _testData_xn);
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public static readonly MatrixTheoryData<uint, uint, uint> TestData_32bit = new(_testData_rd, _testData_rn, _testData_wn);
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[Theory(DisplayName = "CLS <Xd>, <Xn>")]
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[MemberData(nameof(TestData_CLS_x))]
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public void Cls_64bit(uint rd, uint rn, ulong xn)
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[SkippableTheory(DisplayName = "CLS <Xd>, <Xn>")]
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[PairwiseData]
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public void Cls_64bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialMemberData(nameof(GenLeadingSignsX))] ulong xn)
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{
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uint opcode = 0xDAC01400; // CLS X0, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -140,9 +126,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "CLS <Wd>, <Wn>")]
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[MemberData(nameof(TestData_CLS_w))]
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public void Cls_32bit(uint rd, uint rn, uint wn)
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[SkippableTheory(DisplayName = "CLS <Wd>, <Wn>")]
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[PairwiseData]
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public void Cls_32bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialMemberData(nameof(GenLeadingSignsW))] uint wn)
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{
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uint opcode = 0x5AC01400; // CLS W0, W0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -154,9 +142,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "CLZ <Xd>, <Xn>")]
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[MemberData(nameof(TestData_CLZ_x))]
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public void Clz_64bit(uint rd, uint rn, ulong xn)
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[SkippableTheory(DisplayName = "CLZ <Xd>, <Xn>")]
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[PairwiseData]
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public void Clz_64bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialMemberData(nameof(GenLeadingZerosX))] ulong xn)
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{
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uint opcode = 0xDAC01000; // CLZ X0, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -168,9 +158,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "CLZ <Wd>, <Wn>")]
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[MemberData(nameof(TestData_CLZ_w))]
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public void Clz_32bit(uint rd, uint rn, uint wn)
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[SkippableTheory(DisplayName = "CLZ <Wd>, <Wn>")]
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[PairwiseData]
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public void Clz_32bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialMemberData(nameof(GenLeadingZerosW))] uint wn)
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{
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uint opcode = 0x5AC01000; // CLZ W0, W0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -182,9 +174,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "RBIT <Xd>, <Xn>")]
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[MemberData(nameof(TestData_64bit))]
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public void Rbit_64bit(uint rd, uint rn, ulong xn)
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[SkippableTheory(DisplayName = "RBIT <Xd>, <Xn>")]
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[PairwiseData]
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public void Rbit_64bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn)
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{
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uint opcode = 0xDAC00000; // RBIT X0, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -196,9 +191,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "RBIT <Wd>, <Wn>")]
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[MemberData(nameof(TestData_32bit))]
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public void Rbit_32bit(uint rd, uint rn, uint wn)
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[SkippableTheory(DisplayName = "RBIT <Wd>, <Wn>")]
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[PairwiseData]
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public void Rbit_32bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint wn)
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{
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uint opcode = 0x5AC00000; // RBIT W0, W0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -210,9 +208,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "REV16 <Xd>, <Xn>")]
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[MemberData(nameof(TestData_64bit))]
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public void Rev16_64bit(uint rd, uint rn, ulong xn)
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[SkippableTheory(DisplayName = "REV16 <Xd>, <Xn>")]
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[PairwiseData]
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public void Rev16_64bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn)
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{
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uint opcode = 0xDAC00400; // REV16 X0, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -224,9 +225,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "REV16 <Wd>, <Wn>")]
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[MemberData(nameof(TestData_32bit))]
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public void Rev16_32bit(uint rd, uint rn, uint wn)
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[SkippableTheory(DisplayName = "REV16 <Wd>, <Wn>")]
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[PairwiseData]
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public void Rev16_32bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint wn)
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{
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uint opcode = 0x5AC00400; // REV16 W0, W0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -238,9 +242,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "REV32 <Xd>, <Xn>")]
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[MemberData(nameof(TestData_64bit))]
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public void Rev32_64bit(uint rd, uint rn, ulong xn)
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[SkippableTheory(DisplayName = "REV32 <Xd>, <Xn>")]
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[PairwiseData]
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public void Rev32_64bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn)
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{
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uint opcode = 0xDAC00800; // REV32 X0, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -252,9 +259,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "REV <Wd>, <Wn>")]
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[MemberData(nameof(TestData_32bit))]
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public void Rev32_32bit(uint rd, uint rn, uint wn)
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[SkippableTheory(DisplayName = "REV <Wd>, <Wn>")]
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[PairwiseData]
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public void Rev32_32bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint wn)
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{
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uint opcode = 0x5AC00800; // REV W0, W0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -266,9 +276,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Theory(DisplayName = "REV64 <Xd>, <Xn>")]
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[MemberData(nameof(TestData_64bit))]
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public void Rev64_64bit(uint rd, uint rn, ulong xn)
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[SkippableTheory(DisplayName = "REV64 <Xd>, <Xn>")]
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[PairwiseData]
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public void Rev64_64bit([CombinatorialValues(0u, 31u)] uint rd,
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[CombinatorialValues(1u, 31u)] uint rn,
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[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn)
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{
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uint opcode = 0xDAC00C00; // REV64 X0, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -2,12 +2,17 @@
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using System;
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using Xunit;
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using Xunit.Abstractions;
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namespace Ryujinx.Tests.Cpu
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{
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[Collection("Alu32")]
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public sealed class CpuTestAlu32 : CpuTest32
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{
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public CpuTestAlu32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
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{
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}
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#if Alu32
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#region "ValueSource (Opcodes)"
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@ -60,19 +65,12 @@ namespace Ryujinx.Tests.Cpu
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private const int RndCnt = 2;
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private static readonly uint[] _testData_rd = {0u, 0xdu};
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private static readonly uint[] _testData_rm = {1u, 0xdu};
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private static readonly uint[] _testData_wn =
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{
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0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu,
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};
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public static readonly MatrixTheoryData<uint, uint, uint> TestData_32bit = new(_testData_rd, _testData_rm, _testData_wn);
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[Theory(DisplayName = "RBIT <Rd>, <Rn>")]
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[MemberData(nameof(TestData_32bit))]
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public void Rbit_32bit(uint rd, uint rm, uint wn)
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[PairwiseData]
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public void Rbit_32bit([CombinatorialValues(0u, 0xdu)] uint rd,
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[CombinatorialValues(1u, 0xdu)] uint rm,
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[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint wn)
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{
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uint opcode = 0xe6ff0f30u; // RBIT R0, R0
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opcode |= ((rm & 15) << 0) | ((rd & 15) << 12);
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@ -84,11 +82,12 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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public static readonly MatrixTheoryData<uint, uint, int> TestData_Lsr = new(LsrLslAsrRor(), _testData_wn, RangeUtils.RangeData(0, 31, 1));
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[Theory]
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[MemberData(nameof(TestData_Lsr))]
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public void Lsr_Lsl_Asr_Ror(uint opcode, uint shiftValue, int shiftAmount)
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[PairwiseData]
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public void Lsr_Lsl_Asr_Ror([CombinatorialMemberData(nameof(LsrLslAsrRor))] uint opcode,
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[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] uint shiftValue,
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[CombinatorialRange(0, 31, 1)] int shiftAmount)
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{
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uint rd = 0;
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uint rm = 1;
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@ -100,21 +99,14 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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private static readonly uint[] _testData_Sh_rm =
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{
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1u,
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};
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private static readonly uint[] _testData_Sh_rn =
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{
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2u,
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};
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public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint> TestData_Sh = new(_testData_rd, _testData_Sh_rm, _testData_Sh_rn, Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt));
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[Theory]
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[MemberData(nameof(TestData_Sh))]
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public void Shadd8(uint rd, uint rm, uint rn, uint w0, uint w1, uint w2)
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[PairwiseData]
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public void Shadd8([CombinatorialValues(0u, 0xdu)] uint rd,
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[CombinatorialValues(1u)] uint rm,
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[CombinatorialValues(2u)] uint rn,
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[CombinatorialRandomData(Count = RndCnt)] uint w0,
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[CombinatorialRandomData(Count = RndCnt)] uint w1,
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[CombinatorialRandomData(Count = RndCnt)] uint w2)
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{
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uint opcode = 0xE6300F90u; // SHADD8 R0, R0, R0
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|
|
@ -128,8 +120,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Sh))]
|
||||
public void Shsub8(uint rd, uint rm, uint rn, uint w0, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void Shsub8([CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rm,
|
||||
[CombinatorialValues(2u)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w0,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w1,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
uint opcode = 0xE6300FF0u; // SHSUB8 R0, R0, R0
|
||||
|
||||
|
|
@ -142,16 +139,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_sat =
|
||||
{
|
||||
0u, 7u, 8u, 0xfu, 0x10u, 0x1fu,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint> TestData_Ssat = new(SsatUsat(), _testData_rd, _testData_rm, _testData_sat, _testData_sat, _testData_wn);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Ssat))]
|
||||
public void Ssat_Usat(uint opcode, uint rd, uint rn, uint sat, uint shift, uint wn)
|
||||
[PairwiseData]
|
||||
public void Ssat_Usat([CombinatorialMemberData(nameof(SsatUsat))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rn,
|
||||
[CombinatorialValues(0u, 7u, 8u, 0xfu, 0x10u, 0x1fu)] uint sat,
|
||||
[CombinatorialValues(0u, 7u, 8u, 0xfu, 0x10u, 0x1fu)] uint shift,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn)
|
||||
{
|
||||
opcode |= ((rn & 15) << 0) | ((shift & 31) << 7) | ((rd & 15) << 12) | ((sat & 31) << 16);
|
||||
|
||||
|
|
@ -162,16 +158,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_sat16 =
|
||||
{
|
||||
0u, 7u, 8u, 0xfu,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint> TestData_Ssat16 = new(Ssat16Usat16(), _testData_rd, _testData_rm, _testData_sat16, _testData_wn);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Ssat16))]
|
||||
public void Ssat16_Usat16(uint opcode, uint rd, uint rn, uint sat, uint wn)
|
||||
[PairwiseData]
|
||||
public void Ssat16_Usat16([CombinatorialMemberData(nameof(Ssat16Usat16))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rn,
|
||||
[CombinatorialValues(0u, 7u, 8u, 0xfu)] uint sat,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn)
|
||||
{
|
||||
opcode |= ((rn & 15) << 0) | ((rd & 15) << 12) | ((sat & 15) << 16);
|
||||
|
||||
|
|
@ -182,11 +176,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint, uint> TestData_Su = new(SuHAddSub8(), _testData_rd, _testData_Sh_rm, _testData_Sh_rn, Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt));
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Su))]
|
||||
public void SU_H_AddSub_8(uint opcode, uint rd, uint rm, uint rn, uint w0, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void SU_H_AddSub_8([CombinatorialMemberData(nameof(SuHAddSub8))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rm,
|
||||
[CombinatorialValues(2u)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w0,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w1,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
opcode |= ((rm & 15) << 0) | ((rd & 15) << 12) | ((rn & 15) << 16);
|
||||
|
||||
|
|
@ -197,16 +195,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_Uadd_rd=
|
||||
{
|
||||
0u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint> TestData_Uadd = new(_testData_Uadd_rd, _testData_Sh_rm, _testData_Sh_rn, Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt));
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Uadd))]
|
||||
public void Uadd8_Sel(uint rd, uint rm, uint rn, uint w0, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void Uadd8_Sel([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rm,
|
||||
[CombinatorialValues(2u)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w0,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w1,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
uint opUadd8 = 0xE6500F90; // UADD8 R0, R0, R0
|
||||
uint opSel = 0xE6800FB0; // SEL R0, R0, R0
|
||||
|
|
|
|||
|
|
@ -10,6 +10,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
[Collection("AluBinary")]
|
||||
public sealed class CpuTestAluBinary : CpuTest
|
||||
{
|
||||
public CpuTestAluBinary(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if AluBinary
|
||||
public struct CrcTest : IXunitSerializable
|
||||
{
|
||||
|
|
@ -71,35 +75,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
private static readonly ulong[] _testData_xn =
|
||||
{
|
||||
0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul,
|
||||
};
|
||||
private static readonly uint[] _testData_wn =
|
||||
{
|
||||
0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
|
||||
private static readonly uint[] _testData_Crc32_rd =
|
||||
{
|
||||
0u,
|
||||
};
|
||||
private static readonly uint[] _testData_Crc32_rn =
|
||||
{
|
||||
1u,
|
||||
};
|
||||
private static readonly uint[] _testData_Crc32_rm =
|
||||
{
|
||||
2u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, CrcTest> TestData_Crc32 = new(_testData_Crc32_rd, _testData_Crc32_rn, _testData_Crc32_rm, RangeUtils.RangeData(0u, 3u, 1u), _CRC32_Test_Values_());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Crc32))]
|
||||
public void Crc32_b_h_w_x(uint rd, uint rn, uint rm, uint size, CrcTest test)
|
||||
[CombinatorialData]
|
||||
public void Crc32_b_h_w_x([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(2u)] uint rm,
|
||||
[CombinatorialRange(0u, 3u, 1u)] uint size,
|
||||
[CombinatorialMemberData(nameof(_CRC32_Test_Values_))] CrcTest test)
|
||||
{
|
||||
uint opcode = 0x1AC04000; // CRC32B W0, W0, W0
|
||||
|
||||
|
|
@ -117,32 +99,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ExecutionContext context = GetContext();
|
||||
ulong result = context.GetX((int)rd);
|
||||
Assert.True(result == test.Results[size]);
|
||||
Assert.Equal(test.Results[size], result);
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_Crc32x_rd =
|
||||
{
|
||||
0u, 31u,
|
||||
};
|
||||
private static readonly uint[] _testData_Crc32x_rn =
|
||||
{
|
||||
1u, 31u,
|
||||
};
|
||||
private static readonly uint[] _testData_Crc32x_rm =
|
||||
{
|
||||
2u, 31u,
|
||||
};
|
||||
|
||||
private static readonly uint[] _testData_Crc32x_wn =
|
||||
{
|
||||
0x00000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong> TestData_Crc32x = new(_testData_Crc32x_rd, _testData_Crc32x_rn, _testData_Crc32x_rm, _testData_Crc32x_wn, _testData_xn);
|
||||
|
||||
[Theory(DisplayName = "CRC32X <Wd>, <Wn>, <Xm>", Skip = "Unicorn fails.")]
|
||||
[MemberData(nameof(TestData_Crc32x))]
|
||||
public void Crc32x(uint rd, uint rn, uint rm, uint wn, ulong xm)
|
||||
[SkippableTheory(DisplayName = "CRC32X <Wd>, <Wn>, <Xm>", Skip = "Unicorn fails.")]
|
||||
[PairwiseData]
|
||||
public void Crc32x([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((ulong)0x00_00_00_00_00_00_00_00,
|
||||
(ulong)0x7F_FF_FF_FF_FF_FF_FF_FF,
|
||||
0x80_00_00_00_00_00_00_00,
|
||||
0xFF_FF_FF_FF_FF_FF_FF_FF)] ulong xm)
|
||||
{
|
||||
uint opcode = 0x9AC04C00; // CRC32X W0, W0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -154,11 +123,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint> TestData_Crc32w = new(_testData_Crc32x_rd, _testData_Crc32x_rn, _testData_Crc32x_rm, _testData_Crc32x_wn, _testData_wn);
|
||||
|
||||
[Theory(DisplayName = "CRC32W <Wd>, <Wn>, <Wm>", Skip = "Unicorn fails.")]
|
||||
[MemberData(nameof(TestData_Crc32w))]
|
||||
public void Crc32w(uint rd, uint rn, uint rm, uint wn, uint wm)
|
||||
[SkippableTheory(DisplayName = "CRC32W <Wd>, <Wn>, <Wm>", Skip = "Unicorn fails.")]
|
||||
[PairwiseData]
|
||||
public void Crc32w([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF,
|
||||
0x80_00_00_00, 0xFF_FF_FF_FF)] uint wm)
|
||||
{
|
||||
uint opcode = 0x1AC04800; // CRC32W W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -170,17 +142,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly ushort[] _testData_Crc32h_wm =
|
||||
{
|
||||
0x00_00, 0x7F_FF,
|
||||
0x80_00, 0xFF_FF,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ushort> TestData_Crc32h = new(_testData_Crc32x_rd, _testData_Crc32x_rn, _testData_Crc32x_rm, _testData_Crc32x_wn, _testData_Crc32h_wm);
|
||||
|
||||
[Theory(DisplayName = "CRC32H <Wd>, <Wn>, <Wm>", Skip = "Unicorn fails.")]
|
||||
[MemberData(nameof(TestData_Crc32h))]
|
||||
public void Crc32h(uint rd, uint rn, uint rm, uint wn, ushort wm)
|
||||
[SkippableTheory(DisplayName = "CRC32H <Wd>, <Wn>, <Wm>", Skip = "Unicorn fails.")]
|
||||
[PairwiseData]
|
||||
public void Crc32h([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((ushort)0x00_00, (ushort)0x7F_FF,
|
||||
(ushort)0x80_00, (ushort)0xFF_FF)] ushort wm)
|
||||
{
|
||||
uint opcode = 0x1AC04400; // CRC32H W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -192,17 +161,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly byte[] _testData_Crc32b_wm =
|
||||
{
|
||||
0x00, 0x7F,
|
||||
0x80, 0xFF,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, byte> TestData_Crc32b = new(_testData_Crc32x_rd, _testData_Crc32x_rn, _testData_Crc32x_rm, _testData_Crc32x_wn, _testData_Crc32b_wm);
|
||||
|
||||
[Theory(DisplayName = "CRC32B <Wd>, <Wn>, <Wm>", Skip = "Unicorn fails.")]
|
||||
[MemberData(nameof(TestData_Crc32b))]
|
||||
public void Crc32b(uint rd, uint rn, uint rm, uint wn, byte wm)
|
||||
[SkippableTheory(DisplayName = "CRC32B <Wd>, <Wn>, <Wm>", Skip = "Unicorn fails.")]
|
||||
[PairwiseData]
|
||||
public void Crc32b([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm)
|
||||
{
|
||||
uint opcode = 0x1AC04000; // CRC32B W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -214,9 +180,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "CRC32CX <Wd>, <Wn>, <Xm>")]
|
||||
[MemberData(nameof(TestData_Crc32x))]
|
||||
public void Crc32cx(uint rd, uint rn, uint rm, uint wn, ulong xm)
|
||||
[SkippableTheory(DisplayName = "CRC32CX <Wd>, <Wn>, <Xm>")]
|
||||
[PairwiseData]
|
||||
public void Crc32cx([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((ulong)0x00_00_00_00_00_00_00_00,
|
||||
(ulong)0x7F_FF_FF_FF_FF_FF_FF_FF,
|
||||
0x80_00_00_00_00_00_00_00,
|
||||
0xFF_FF_FF_FF_FF_FF_FF_FF)] ulong xm)
|
||||
{
|
||||
uint opcode = 0x9AC05C00; // CRC32CX W0, W0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -228,9 +201,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "CRC32CW <Wd>, <Wn>, <Wm>")]
|
||||
[MemberData(nameof(TestData_Crc32w))]
|
||||
public void Crc32cw(uint rd, uint rn, uint rm, uint wn, uint wm)
|
||||
[SkippableTheory(DisplayName = "CRC32CW <Wd>, <Wn>, <Wm>")]
|
||||
[PairwiseData]
|
||||
public void Crc32cw([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF,
|
||||
0x80_00_00_00, 0xFF_FF_FF_FF)] uint wm)
|
||||
{
|
||||
uint opcode = 0x1AC05800; // CRC32CW W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -242,9 +220,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "CRC32CH <Wd>, <Wn>, <Wm>")]
|
||||
[MemberData(nameof(TestData_Crc32h))]
|
||||
public void Crc32ch(uint rd, uint rn, uint rm, uint wn, ushort wm)
|
||||
[SkippableTheory(DisplayName = "CRC32CH <Wd>, <Wn>, <Wm>")]
|
||||
[PairwiseData]
|
||||
public void Crc32ch([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((ushort)0x00_00, (ushort)0x7F_FF,
|
||||
(ushort)0x80_00, (ushort)0xFF_FF)] ushort wm)
|
||||
{
|
||||
uint opcode = 0x1AC05400; // CRC32CH W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -256,9 +239,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "CRC32CB <Wd>, <Wn>, <Wm>")]
|
||||
[MemberData(nameof(TestData_Crc32b))]
|
||||
public void Crc32cb(uint rd, uint rn, uint rm, uint wn, byte wm)
|
||||
[SkippableTheory(DisplayName = "CRC32CB <Wd>, <Wn>, <Wm>")]
|
||||
[PairwiseData]
|
||||
public void Crc32cb([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm)
|
||||
{
|
||||
uint opcode = 0x1AC05000; // CRC32CB W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -270,11 +258,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, ulong, ulong> TestData_Sdiv64 = new(_testData_Crc32x_rd, _testData_Crc32x_rn, _testData_Crc32x_rm, _testData_xn, _testData_xn);
|
||||
|
||||
[Theory(DisplayName = "SDIV <Xd>, <Xn>, <Xm>")]
|
||||
[MemberData(nameof(TestData_Sdiv64))]
|
||||
public void Sdiv_64bit(uint rd, uint rn, uint rm, ulong xn, ulong xm)
|
||||
[SkippableTheory(DisplayName = "SDIV <Xd>, <Xn>, <Xm>")]
|
||||
[PairwiseData]
|
||||
public void Sdiv_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm)
|
||||
{
|
||||
uint opcode = 0x9AC00C00; // SDIV X0, X0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -286,11 +278,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint> TestData_Sdiv32 = new(_testData_Crc32x_rd, _testData_Crc32x_rn, _testData_Crc32x_rm, _testData_wn, _testData_wn);
|
||||
|
||||
[Theory(DisplayName = "SDIV <Wd>, <Wn>, <Wm>")]
|
||||
[MemberData(nameof(TestData_Sdiv32))]
|
||||
public void Sdiv_32bit(uint rd, uint rn, uint rm, uint wn, uint wm)
|
||||
[SkippableTheory(DisplayName = "SDIV <Wd>, <Wn>, <Wm>")]
|
||||
[PairwiseData]
|
||||
public void Sdiv_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm)
|
||||
{
|
||||
uint opcode = 0x1AC00C00; // SDIV W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -302,9 +298,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "UDIV <Xd>, <Xn>, <Xm>")]
|
||||
[MemberData(nameof(TestData_Sdiv64))]
|
||||
public void Udiv_64bit(uint rd, uint rn, uint rm, ulong xn, ulong xm)
|
||||
[SkippableTheory(DisplayName = "UDIV <Xd>, <Xn>, <Xm>")]
|
||||
[PairwiseData]
|
||||
public void Udiv_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm)
|
||||
{
|
||||
uint opcode = 0x9AC00800; // UDIV X0, X0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -316,9 +318,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "UDIV <Wd>, <Wn>, <Wm>")]
|
||||
[MemberData(nameof(TestData_Sdiv32))]
|
||||
public void Udiv_32bit(uint rd, uint rn, uint rm, uint wn, uint wm)
|
||||
[SkippableTheory(DisplayName = "UDIV <Wd>, <Wn>, <Wm>")]
|
||||
[PairwiseData]
|
||||
public void Udiv_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm)
|
||||
{
|
||||
uint opcode = 0x1AC00800; // UDIV W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
|
|||
|
|
@ -11,6 +11,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
[Collection("AluBinary32")]
|
||||
public sealed class CpuTestAluBinary32 : CpuTest32
|
||||
{
|
||||
public CpuTestAluBinary32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if AluBinary32
|
||||
public struct CrcTest32 : IXunitSerializable
|
||||
{
|
||||
|
|
@ -83,24 +87,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
private static uint[] _testData_rd =
|
||||
{
|
||||
0u,
|
||||
};
|
||||
private static uint[] _testData_rn =
|
||||
{
|
||||
1u,
|
||||
};
|
||||
private static uint[] _testData_rm =
|
||||
{
|
||||
2u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, CrcTest32> TestData = new(_testData_rd, _testData_rn, _testData_rm, RangeUtils.RangeData(0u, 2u, 1u), _CRC32_Test_Values_());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void Crc32_Crc32c_b_h_w(uint rd, uint rn, uint rm, uint size, CrcTest32 test)
|
||||
[CombinatorialData]
|
||||
public void Crc32_Crc32c_b_h_w([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(2u)] uint rm,
|
||||
[CombinatorialRange(0u, 2u, 1u)] uint size,
|
||||
[CombinatorialMemberData(nameof(_CRC32_Test_Values_))] CrcTest32 test)
|
||||
{
|
||||
// Unicorn does not yet support 32bit crc instructions, so test against a known table of results/values.
|
||||
|
||||
|
|
@ -118,7 +111,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ExecutionContext context = GetContext();
|
||||
ulong result = context.GetX((int)rd);
|
||||
Assert.True(result == test.Results[size]);
|
||||
Assert.Equal(test.Results[size], result);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,47 +2,27 @@
|
|||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("AluImm")]
|
||||
public sealed class CpuTestAluImm : CpuTest
|
||||
{
|
||||
public CpuTestAluImm(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if AluImm
|
||||
|
||||
private static readonly uint[] _testData_rd =
|
||||
{
|
||||
0u, 31u,
|
||||
};
|
||||
private static readonly uint[] _testData_rn =
|
||||
{
|
||||
1u, 31u,
|
||||
};
|
||||
private static readonly ulong[] _testData_xnSp =
|
||||
{
|
||||
0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul,
|
||||
};
|
||||
private static readonly uint[] _testData_imm =
|
||||
{
|
||||
0u, 4095u,
|
||||
};
|
||||
private static readonly uint[] _testData_shift =
|
||||
{
|
||||
0b00u, 0b01u, // <LSL #0, LSL #12>
|
||||
};
|
||||
private static readonly uint[] _testData_wnWsp =
|
||||
{
|
||||
0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, ulong, uint, uint> TestData_64 = new(_testData_rd, _testData_rn, _testData_xnSp, _testData_imm, _testData_shift);
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint> TestData_32 = new(_testData_rd, _testData_rn, _testData_wnWsp, _testData_imm, _testData_shift);
|
||||
|
||||
[Theory(DisplayName = "ADD <Xd|SP>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_64))]
|
||||
public void Add_64bit(uint rd, uint rn, ulong xnSp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "ADD <Xd|SP>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Add_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0x91000000; // ADD X0, X0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -60,9 +40,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ADD <Wd|WSP>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_32))]
|
||||
public void Add_32bit(uint rd, uint rn, uint wnWsp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "ADD <Wd|WSP>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Add_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0x11000000; // ADD W0, W0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -80,9 +65,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ADDS <Xd>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_64))]
|
||||
public void Adds_64bit(uint rd, uint rn, ulong xnSp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "ADDS <Xd>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Adds_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0xB1000000; // ADDS X0, X0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -100,9 +90,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ADDS <Wd>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_32))]
|
||||
public void Adds_32bit(uint rd, uint rn, uint wnWsp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "ADDS <Wd>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Adds_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0x31000000; // ADDS W0, W0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -120,20 +115,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_N1_imms =
|
||||
{
|
||||
0u, 31u, 32u, 62u, // <imm>
|
||||
};
|
||||
private static readonly uint[] _testData_N1_immr =
|
||||
{
|
||||
0u, 31u, 32u, 63u, // <imm>
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, ulong, uint, uint> TestData_N1 = new(_testData_rd, _testData_rn, _testData_xnSp, _testData_N1_imms, _testData_N1_immr);
|
||||
|
||||
[Theory(DisplayName = "AND <Xd|SP>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N1))]
|
||||
public void And_N1_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "AND <Xd|SP>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void And_N1_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 31u, 32u, 62u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0x92400000; // AND X0, X0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -146,20 +135,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static uint[] _testData_N0_imms =
|
||||
{
|
||||
0u, 15u, 16u, 30u, // <imm>
|
||||
};
|
||||
private static uint[] _testData_N0_immr =
|
||||
{
|
||||
0u, 15u, 16u, 31u, // <imm>
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, ulong, uint, uint> TestData_N0 = new(_testData_rd, _testData_rn, _testData_xnSp, _testData_N0_imms, _testData_N0_immr);
|
||||
|
||||
[Theory(DisplayName = "AND <Xd|SP>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N0))]
|
||||
public void And_N0_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "AND <Xd|SP>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void And_N0_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0x92000000; // AND X0, X0, #0x100000001
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -172,11 +155,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint> TestData_Add32 = new(_testData_rd, _testData_rd, _testData_wnWsp, _testData_N0_imms, _testData_N0_immr);
|
||||
|
||||
[Theory(DisplayName = "AND <Wd|WSP>, <Wn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_Add32))]
|
||||
public void And_32bit(uint rd, uint rn, uint wn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "AND <Wd|WSP>, <Wn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void And_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0x12000000; // AND W0, W0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -189,9 +175,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ANDS <Xd>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N1))]
|
||||
public void Ands_N1_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "ANDS <Xd>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Ands_N1_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 31u, 32u, 62u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0xF2400000; // ANDS X0, X0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -204,9 +195,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ANDS <Xd>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N1))]
|
||||
public void Ands_N0_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "ANDS <Xd>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Ands_N0_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0xF2000000; // ANDS X0, X0, #0x100000001
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -219,9 +215,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ANDS <Wd>, <Wn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_Add32))]
|
||||
public void Ands_32bit(uint rd, uint rn, uint wn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "ANDS <Wd>, <Wn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Ands_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0x72000000; // ANDS W0, W0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -234,9 +235,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "EOR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N1))]
|
||||
public void Eor_N1_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "EOR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Eor_N1_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 31u, 32u, 62u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0xD2400000; // EOR X0, X0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -249,9 +255,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "EOR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N0))]
|
||||
public void Eor_N0_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "EOR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Eor_N0_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0xD2000000; // EOR X0, X0, #0x100000001
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -264,9 +275,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "EOR <Wd>, <Wn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_Add32))]
|
||||
public void Eor_32bit(uint rd, uint rn, uint wn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "EOR <Wd>, <Wn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Eor_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0x52000000; // EOR W0, W0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -279,9 +295,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ORR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N1))]
|
||||
public void Orr_N1_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "ORR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Orr_N1_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 31u, 32u, 62u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0xB2400000; // ORR X0, X0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -294,9 +315,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ORR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_N0))]
|
||||
public void Orr_N0_64bit(uint rd, uint rn, ulong xn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "ORR <Xd|SP>, <Xn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Orr_N0_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0xB2000000; // ORR X0, X0, #0x100000001
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -309,9 +335,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "ORR <Wd|WSP>, <Wn>, #<imm>")]
|
||||
[MemberData(nameof(TestData_Add32))]
|
||||
public void Orr_32bit(uint rd, uint rn, uint wn, uint imms, uint immr)
|
||||
[SkippableTheory(DisplayName = "ORR <Wd|WSP>, <Wn>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Orr_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 30u)] uint imms, // <imm>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr) // <imm>
|
||||
{
|
||||
uint opcode = 0x32000000; // ORR W0, W0, #0x1
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -324,20 +355,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_Sub_imm =
|
||||
{
|
||||
0u, 4095u,
|
||||
};
|
||||
private static readonly uint[] _testData_Sub_shift =
|
||||
{
|
||||
0b00u, 0b01u, // <LSL #0, LSL #12>
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, ulong, uint, uint> TestData_Sub64 = new(_testData_rd, _testData_rn, _testData_xnSp, _testData_Sub_imm, _testData_Sub_shift);
|
||||
|
||||
[Theory(DisplayName = "SUB <Xd|SP>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_Sub64))]
|
||||
public void Sub_64bit(uint rd, uint rn, ulong xnSp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "SUB <Xd|SP>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Sub_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0xD1000000; // SUB X0, X0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -355,11 +380,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint> TestData_Sub32 = new(_testData_rd, _testData_rn, _testData_wnWsp, _testData_Sub_imm, _testData_Sub_shift);
|
||||
|
||||
[Theory(DisplayName = "SUB <Wd|WSP>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_Sub32))]
|
||||
public void Sub_32bit(uint rd, uint rn, uint wnWsp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "SUB <Wd|WSP>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Sub_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0x51000000; // SUB W0, W0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -377,9 +405,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "SUBS <Xd>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_Sub64))]
|
||||
public void Subs_64bit(uint rd, uint rn, ulong xnSp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "SUBS <Xd>, <Xn|SP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Subs_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0xF1000000; // SUBS X0, X0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -397,9 +430,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory(DisplayName = "SUBS <Wd>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[MemberData(nameof(TestData_Sub32))]
|
||||
public void Subs_32bit(uint rd, uint rn, uint wnWsp, uint imm, uint shift)
|
||||
[SkippableTheory(DisplayName = "SUBS <Wd>, <Wn|WSP>, #<imm>{, <shift>}")]
|
||||
[PairwiseData]
|
||||
public void Subs_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift) // <LSL #0, LSL #12>
|
||||
{
|
||||
uint opcode = 0x71000000; // SUBS W0, W0, #0, LSL #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
|
|||
|
|
@ -2,12 +2,17 @@
|
|||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("AluImm32")]
|
||||
public sealed class CpuTestAluImm32 : CpuTest32
|
||||
{
|
||||
public CpuTestAluImm32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if AluImm32
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
|
|
@ -35,25 +40,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
private const int RndCnt = 2;
|
||||
|
||||
private static readonly uint[] _testData_rd =
|
||||
{
|
||||
0u, 13u,
|
||||
};
|
||||
private static readonly uint[] _testData_rn =
|
||||
{
|
||||
1u, 13u,
|
||||
};
|
||||
private static readonly bool[] _testData_carry =
|
||||
{
|
||||
false,
|
||||
true,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, bool> TestData = new(Opcodes(), _testData_rd, _testData_rn, Random.Shared.NextUIntEnumerable(RndCnt), Random.Shared.NextUIntEnumerable(RndCnt), _testData_carry);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void TestCpuTestAluImm32(uint opcode, uint rd, uint rn, uint imm, uint wn, bool carryIn)
|
||||
[PairwiseData]
|
||||
public void TestCpuTestAluImm32([CombinatorialMemberData(nameof(Opcodes))] uint opcode,
|
||||
[CombinatorialValues(0u, 13u)] uint rd,
|
||||
[CombinatorialValues(1u, 13u)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint imm,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint wn,
|
||||
[CombinatorialValues(true, false)] bool carryIn)
|
||||
{
|
||||
opcode |= ((imm & 0xfff) << 0) | ((rn & 15) << 16) | ((rd & 15) << 12);
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -2,12 +2,17 @@
|
|||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("AluRs32")]
|
||||
public sealed class CpuTestAluRs32 : CpuTest32
|
||||
{
|
||||
public CpuTestAluRs32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if AluRs32
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
|
|
@ -36,34 +41,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
private static readonly uint[] _testData_rd =
|
||||
{
|
||||
0u, 13u,
|
||||
};
|
||||
private static readonly uint[] _testData_rn =
|
||||
{
|
||||
1u, 13u,
|
||||
};
|
||||
private static readonly uint[] _testData_rm =
|
||||
{
|
||||
2u, 13u,
|
||||
};
|
||||
private static readonly uint[] _testData_wn =
|
||||
{
|
||||
0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
private static readonly bool[] _testData_carry =
|
||||
{
|
||||
false,
|
||||
true,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint, bool> TestData = new(_Adc_Adcs_Rsc_Rscs_Sbc_Sbcs_(), _testData_rd, _testData_rn, _testData_rm, _testData_wn, _testData_wn, _testData_carry);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void Adc_Adcs_Rsc_Rscs_Sbc_Sbcs(uint opcode, uint rd, uint rn, uint rm, uint wn, uint wm, bool carryIn)
|
||||
[PairwiseData]
|
||||
public void Adc_Adcs_Rsc_Rscs_Sbc_Sbcs([CombinatorialMemberData(nameof(_Adc_Adcs_Rsc_Rscs_Sbc_Sbcs_))] uint opcode,
|
||||
[CombinatorialValues(0u, 13u)] uint rd,
|
||||
[CombinatorialValues(1u, 13u)] uint rn,
|
||||
[CombinatorialValues(2u, 13u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
bool carryIn)
|
||||
{
|
||||
opcode |= ((rm & 15) << 0) | ((rn & 15) << 16) | ((rd & 15) << 12);
|
||||
|
||||
|
|
@ -74,20 +63,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_shift =
|
||||
{
|
||||
0b00u, 0b01u, 0b10u, 0b11u, // <LSL, LSR, ASR, ROR>
|
||||
};
|
||||
private static readonly uint[] _testData_amount =
|
||||
{
|
||||
0u, 15u, 16u, 31u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint, uint, uint> TestData_Add = new(_Add_Adds_Rsb_Rsbs_(), _testData_rd, _testData_rn, _testData_rm, _testData_wn, _testData_wn, _testData_shift, _testData_amount);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Add))]
|
||||
public void Add_Adds_Rsb_Rsbs(uint opcode, uint rd, uint rn, uint rm, uint wn, uint wm, uint shift, uint amount)
|
||||
[PairwiseData]
|
||||
public void Add_Adds_Rsb_Rsbs([CombinatorialMemberData(nameof(_Add_Adds_Rsb_Rsbs_))] uint opcode,
|
||||
[CombinatorialValues(0u, 13u)] uint rd,
|
||||
[CombinatorialValues(1u, 13u)] uint rn,
|
||||
[CombinatorialValues(2u, 13u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[CombinatorialValues(0b00u, 0b01u, 0b10u, 0b11u)] uint shift, // <LSL, LSR, ASR, ROR>
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint amount)
|
||||
{
|
||||
opcode |= ((rm & 15) << 0) | ((rn & 15) << 16) | ((rd & 15) << 12);
|
||||
opcode |= ((shift & 3) << 5) | ((amount & 31) << 7);
|
||||
|
|
|
|||
|
|
@ -1,24 +1,31 @@
|
|||
// #define AluRx
|
||||
#define AluRx
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("AluRx")]
|
||||
public sealed class CpuTestAluRx : CpuTest
|
||||
{
|
||||
public CpuTestAluRx(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if AluRx
|
||||
|
||||
[Test, Pairwise, Description("ADD <Xd|SP>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
public void Add_X_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADD <Xd|SP>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_X_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
[CombinatorialValues((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
0x8000000000000000, 0xFFFFFFFFFFFFFFFF)] ulong xm,
|
||||
[Values(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x8B206000; // ADD X0, X0, X0, UXTX #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -26,7 +33,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: xm, x31: x31);
|
||||
}
|
||||
|
|
@ -38,17 +45,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADD <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Add_W_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADD <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_W_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x8B200000; // ADD X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -56,7 +64,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: wm, x31: x31);
|
||||
}
|
||||
|
|
@ -68,17 +76,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADD <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Add_H_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADD <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_H_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x8B200000; // ADD X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -86,7 +95,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: wm, x31: x31);
|
||||
}
|
||||
|
|
@ -98,17 +107,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADD <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Add_B_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADD <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_B_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x8B200000; // ADD X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -116,7 +126,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: wm, x31: x31);
|
||||
}
|
||||
|
|
@ -128,17 +138,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADD <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Add_W_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "ADD <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_W_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x0B200000; // ADD W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -146,7 +157,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wnWsp, x2: wm, x31: w31);
|
||||
}
|
||||
|
|
@ -158,17 +169,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADD <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Add_H_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "ADD <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_H_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x0B200000; // ADD W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -176,7 +188,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wnWsp, x2: wm, x31: w31);
|
||||
}
|
||||
|
|
@ -188,17 +200,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADD <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Add_B_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "ADD <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Add_B_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x0B200000; // ADD W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -206,7 +219,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wnWsp, x2: wm, x31: w31);
|
||||
}
|
||||
|
|
@ -218,16 +231,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Xd>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
public void Adds_X_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADDS <Xd>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_X_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
[CombinatorialValues((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
0x8000000000000000, 0xFFFFFFFFFFFFFFFF)] ulong xm,
|
||||
[Values(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xAB206000; // ADDS X0, X0, X0, UXTX #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -238,17 +252,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Adds_W_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADDS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_W_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xAB200000; // ADDS X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -259,17 +274,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Adds_H_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADDS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_H_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xAB200000; // ADDS X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -280,17 +296,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Adds_B_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "ADDS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_B_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xAB200000; // ADDS X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -301,17 +318,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Adds_W_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "ADDS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_W_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x2B200000; // ADDS W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -322,17 +340,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Adds_H_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "ADDS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_H_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x2B200000; // ADDS W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -343,17 +362,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("ADDS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Adds_B_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "ADDS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Adds_B_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x2B200000; // ADDS W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -364,16 +384,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Xd|SP>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
public void Sub_X_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUB <Xd|SP>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_X_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
[CombinatorialValues((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
0x8000000000000000, 0xFFFFFFFFFFFFFFFF)] ulong xm,
|
||||
[Values(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xCB206000; // SUB X0, X0, X0, UXTX #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -381,7 +402,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: xm, x31: x31);
|
||||
}
|
||||
|
|
@ -393,17 +414,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Sub_W_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUB <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_W_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xCB200000; // SUB X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -411,7 +433,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: wm, x31: x31);
|
||||
}
|
||||
|
|
@ -423,17 +445,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Sub_H_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUB <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_H_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xCB200000; // SUB X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -441,7 +464,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: wm, x31: x31);
|
||||
}
|
||||
|
|
@ -453,17 +476,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Sub_B_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUB <Xd|SP>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_B_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xCB200000; // SUB X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -471,7 +495,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xnSp, x2: wm, x31: x31);
|
||||
}
|
||||
|
|
@ -483,17 +507,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Sub_W_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SUB <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_W_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x4B200000; // SUB W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -501,7 +526,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wnWsp, x2: wm, x31: w31);
|
||||
}
|
||||
|
|
@ -513,17 +538,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Sub_H_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SUB <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_H_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x4B200000; // SUB W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -531,7 +557,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wnWsp, x2: wm, x31: w31);
|
||||
}
|
||||
|
|
@ -543,17 +569,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUB <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Sub_B_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SUB <Wd|WSP>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Sub_B_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x4B200000; // SUB W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -561,7 +588,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
if (rn != 31)
|
||||
{
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wnWsp, x2: wm, x31: w31);
|
||||
}
|
||||
|
|
@ -573,16 +600,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Xd>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
public void Subs_X_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUBS <Xd>, <Xn|SP>, <X><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_X_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
[CombinatorialValues((ulong)0x0000000000000000, (ulong)0x7FFFFFFFFFFFFFFF,
|
||||
0x8000000000000000, 0xFFFFFFFFFFFFFFFF)] ulong xm,
|
||||
[Values(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0b011u, 0b111u)] uint extend, // <LSL|UXTX, SXTX>
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xEB206000; // SUBS X0, X0, X0, UXTX #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -593,17 +621,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Subs_W_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUBS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_W_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xEB200000; // SUBS X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -614,17 +643,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Subs_H_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUBS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_H_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xEB200000; // SUBS X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -635,17 +665,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
public void Subs_B_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SUBS <Xd>, <Xn|SP>, <W><m>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_B_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xnSp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, // <UXTB, UXTH, UXTW,
|
||||
0b100u, 0b101u, 0b110u)] uint extend, // SXTB, SXTH, SXTW>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0xEB200000; // SUBS X0, X0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -656,17 +687,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Subs_W_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SUBS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_W_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
[CombinatorialValues((uint)0x00000000, (uint)0x7FFFFFFF,
|
||||
0x80000000, 0xFFFFFFFF)] uint wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x6B200000; // SUBS W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -677,17 +709,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Subs_H_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SUBS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_H_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((ushort)0x0000, (ushort)0x7FFF,
|
||||
[CombinatorialValues((ushort)0x0000, (ushort)0x7FFF,
|
||||
(ushort)0x8000, (ushort)0xFFFF)] ushort wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x6B200000; // SUBS W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -698,17 +731,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SUBS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
public void Subs_B_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SUBS <Wd>, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}")]
|
||||
[PairwiseData]
|
||||
public void Subs_B_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wnWsp,
|
||||
[Values((byte)0x00, (byte)0x7F,
|
||||
[CombinatorialValues((byte)0x00, (byte)0x7F,
|
||||
(byte)0x80, (byte)0xFF)] byte wm,
|
||||
[Values(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
[CombinatorialValues(0b000u, 0b001u, 0b010u, 0b011u, // <UXTB, UXTH, LSL|UXTW, UXTX,
|
||||
0b100u, 0b101u, 0b110u, 0b111u)] uint extend, // SXTB, SXTH, SXTW, SXTX>
|
||||
[Values(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u)] uint amount)
|
||||
{
|
||||
uint opcode = 0x6B200000; // SUBS W0, W0, W0, UXTB #0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
|
|||
|
|
@ -2,34 +2,27 @@
|
|||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Bf32")]
|
||||
public sealed class CpuTestBf32 : CpuTest32
|
||||
{
|
||||
public CpuTestBf32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Bf32
|
||||
private const int RndCnt = 2;
|
||||
|
||||
private static readonly uint[] _testData_rd =
|
||||
{
|
||||
0u, 0xdu,
|
||||
};
|
||||
private static readonly uint[] _testData_wd =
|
||||
{
|
||||
0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
private static readonly uint[] _testData_lsb =
|
||||
{
|
||||
0u, 15u, 16u, 31u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint> TestData_Bfc = new(_testData_rd, _testData_wd, _testData_lsb, _testData_lsb);
|
||||
|
||||
[Theory(DisplayName = "BFC <Rd>, #<lsb>, #<width>")]
|
||||
[MemberData(nameof(TestData_Bfc))]
|
||||
public void Bfc(uint rd, uint wd, uint lsb, uint msb)
|
||||
[PairwiseData]
|
||||
public void Bfc([CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wd,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint lsb,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint msb)
|
||||
{
|
||||
msb = Math.Max(lsb, msb); // Don't test unpredictable for now.
|
||||
uint opcode = 0xe7c0001fu; // BFC R0, #0, #1
|
||||
|
|
@ -43,16 +36,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_rn =
|
||||
{
|
||||
1u, 0xdu,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint> TestData_Bfi = new(_testData_rd, _testData_rn, Random.Shared.NextUIntEnumerable(RndCnt), _testData_wd, _testData_lsb, _testData_lsb);
|
||||
|
||||
[Theory(DisplayName = "BFI <Rd>, <Rn>, #<lsb>, #<width>")]
|
||||
[MemberData(nameof(TestData_Bfi))]
|
||||
public void Bfi(uint rd, uint rn, uint wd, uint wn, uint lsb, uint msb)
|
||||
[PairwiseData]
|
||||
public void Bfi([CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint wd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint lsb,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint msb)
|
||||
{
|
||||
msb = Math.Max(lsb, msb); // Don't test unpredictable for now.
|
||||
uint opcode = 0xe7c00010u; // BFI R0, R0, #0, #1
|
||||
|
|
@ -68,8 +60,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
[Theory(DisplayName = "UBFX <Rd>, <Rn>, #<lsb>, #<width>")]
|
||||
[MemberData(nameof(TestData_Bfi))]
|
||||
public void Ubfx(uint rd, uint rn, uint wd, uint wn, uint lsb, uint widthm1)
|
||||
[PairwiseData]
|
||||
public void Ubfx([CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint wd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint lsb,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint widthm1)
|
||||
{
|
||||
if (lsb + widthm1 > 31)
|
||||
{
|
||||
|
|
@ -88,8 +86,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
[Theory(DisplayName = "SBFX <Rd>, <Rn>, #<lsb>, #<width>")]
|
||||
[MemberData(nameof(TestData_Bfi))]
|
||||
public void Sbfx(uint rd, uint rn, uint wd, uint wn, uint lsb, uint widthm1)
|
||||
[PairwiseData]
|
||||
public void Sbfx([CombinatorialValues(0u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint wd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint lsb,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint widthm1)
|
||||
{
|
||||
if (lsb + widthm1 > 31)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,125 +1,137 @@
|
|||
// #define Bfm
|
||||
#define Bfm
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Bfm")]
|
||||
public sealed class CpuTestBfm : CpuTest
|
||||
{
|
||||
public CpuTestBfm(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Bfm
|
||||
private const int RndCnt = 2;
|
||||
|
||||
[Test, Pairwise, Description("BFM <Xd>, <Xn>, #<immr>, #<imms>")]
|
||||
public void Bfm_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Random(RndCnt)] ulong xd,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "BFM <Xd>, <Xn>, #<immr>, #<imms>")]
|
||||
[PairwiseData]
|
||||
public void Bfm_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong xd,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0u, 31u, 32u, 63u)] uint immr,
|
||||
[Values(0u, 31u, 32u, 63u)] uint imms)
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr,
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint imms)
|
||||
{
|
||||
uint opcode = 0xB3400000; // BFM X0, X0, #0, #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x0: xd, x1: xn, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("BFM <Wd>, <Wn>, #<immr>, #<imms>")]
|
||||
public void Bfm_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Random(RndCnt)] uint wd,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "BFM <Wd>, <Wn>, #<immr>, #<imms>")]
|
||||
[PairwiseData]
|
||||
public void Bfm_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint wd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0u, 15u, 16u, 31u)] uint immr,
|
||||
[Values(0u, 15u, 16u, 31u)] uint imms)
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint imms)
|
||||
{
|
||||
uint opcode = 0x33000000; // BFM W0, W0, #0, #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x0: wd, x1: wn, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SBFM <Xd>, <Xn>, #<immr>, #<imms>")]
|
||||
public void Sbfm_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SBFM <Xd>, <Xn>, #<immr>, #<imms>")]
|
||||
[PairwiseData]
|
||||
public void Sbfm_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0u, 31u, 32u, 63u)] uint immr,
|
||||
[Values(0u, 31u, 32u, 63u)] uint imms)
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr,
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint imms)
|
||||
{
|
||||
uint opcode = 0x93400000; // SBFM X0, X0, #0, #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SBFM <Wd>, <Wn>, #<immr>, #<imms>")]
|
||||
public void Sbfm_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SBFM <Wd>, <Wn>, #<immr>, #<imms>")]
|
||||
[PairwiseData]
|
||||
public void Sbfm_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0u, 15u, 16u, 31u)] uint immr,
|
||||
[Values(0u, 15u, 16u, 31u)] uint imms)
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint imms)
|
||||
{
|
||||
uint opcode = 0x13000000; // SBFM W0, W0, #0, #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UBFM <Xd>, <Xn>, #<immr>, #<imms>")]
|
||||
public void Ubfm_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "UBFM <Xd>, <Xn>, #<immr>, #<imms>")]
|
||||
[PairwiseData]
|
||||
public void Ubfm_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0u, 31u, 32u, 63u)] uint immr,
|
||||
[Values(0u, 31u, 32u, 63u)] uint imms)
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint immr,
|
||||
[CombinatorialValues(0u, 31u, 32u, 63u)] uint imms)
|
||||
{
|
||||
uint opcode = 0xD3400000; // UBFM X0, X0, #0, #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UBFM <Wd>, <Wn>, #<immr>, #<imms>")]
|
||||
public void Ubfm_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "UBFM <Wd>, <Wn>, #<immr>, #<imms>")]
|
||||
[PairwiseData]
|
||||
public void Ubfm_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0u, 15u, 16u, 31u)] uint immr,
|
||||
[Values(0u, 15u, 16u, 31u)] uint imms)
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint immr,
|
||||
[CombinatorialValues(0u, 15u, 16u, 31u)] uint imms)
|
||||
{
|
||||
uint opcode = 0x53000000; // UBFM W0, W0, #0, #0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,22 +1,34 @@
|
|||
// #define CcmpImm
|
||||
#define CcmpImm
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("CcmpImm")]
|
||||
public sealed class CpuTestCcmpImm : CpuTest
|
||||
{
|
||||
#if CcmpImm
|
||||
private const int RndCntNzcv = 2;
|
||||
public CpuTestCcmpImm(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMN <Xn>, #<imm>, #<nzcv>, <cond>")]
|
||||
public void Ccmn_64bit([Values(1u, 31u)] uint rn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
#if CcmpImm
|
||||
|
||||
public static readonly uint[] RandomNzcv =
|
||||
{
|
||||
Random.Shared.NextUInt(15u),
|
||||
Random.Shared.NextUInt(15u),
|
||||
};
|
||||
|
||||
[SkippableTheory(DisplayName = "CCMN <Xn>, #<imm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmn_64bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0u, 31u)] uint imm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0u, 31u)] uint imm,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -25,20 +37,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5);
|
||||
opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMN <Wn>, #<imm>, #<nzcv>, <cond>")]
|
||||
public void Ccmn_32bit([Values(1u, 31u)] uint rn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CCMN <Wn>, #<imm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmn_32bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0u, 31u)] uint imm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0u, 31u)] uint imm,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -47,20 +60,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5);
|
||||
opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMP <Xn>, #<imm>, #<nzcv>, <cond>")]
|
||||
public void Ccmp_64bit([Values(1u, 31u)] uint rn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "CCMP <Xn>, #<imm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmp_64bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0u, 31u)] uint imm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0u, 31u)] uint imm,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -69,20 +83,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5);
|
||||
opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMP <Wn>, #<imm>, #<nzcv>, <cond>")]
|
||||
public void Ccmp_32bit([Values(1u, 31u)] uint rn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CCMP <Wn>, #<imm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmp_32bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0u, 31u)] uint imm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0u, 31u)] uint imm,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -91,7 +106,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5);
|
||||
opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,24 +1,35 @@
|
|||
// #define CcmpReg
|
||||
#define CcmpReg
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("CcmpReg")]
|
||||
public sealed class CpuTestCcmpReg : CpuTest
|
||||
{
|
||||
#if CcmpReg
|
||||
private const int RndCntNzcv = 2;
|
||||
public CpuTestCcmpReg(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMN <Xn>, <Xm>, #<nzcv>, <cond>")]
|
||||
public void Ccmn_64bit([Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
#if CcmpReg
|
||||
public static readonly uint[] RandomNzcv =
|
||||
{
|
||||
Random.Shared.NextUInt(15u),
|
||||
Random.Shared.NextUInt(15u),
|
||||
};
|
||||
|
||||
[SkippableTheory(DisplayName = "CCMN <Xn>, <Xm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmn_64bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -27,22 +38,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
|
||||
opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMN <Wn>, <Wm>, #<nzcv>, <cond>")]
|
||||
public void Ccmn_32bit([Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CCMN <Wn>, <Wm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmn_32bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -51,22 +63,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
|
||||
opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMP <Xn>, <Xm>, #<nzcv>, <cond>")]
|
||||
public void Ccmp_64bit([Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "CCMP <Xn>, <Xm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmp_64bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -75,22 +88,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
|
||||
opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CCMP <Wn>, <Wm>, #<nzcv>, <cond>")]
|
||||
public void Ccmp_32bit([Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CCMP <Wn>, <Wm>, #<nzcv>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Ccmp_32bit([CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -99,7 +113,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5);
|
||||
opcode |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,23 +1,30 @@
|
|||
// #define Csel
|
||||
#define Csel
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Csel")]
|
||||
public sealed class CpuTestCsel : CpuTest
|
||||
{
|
||||
public CpuTestCsel(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Csel
|
||||
|
||||
[Test, Pairwise, Description("CSEL <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
public void Csel_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "CSEL <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csel_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -26,22 +33,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSEL <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
public void Csel_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CSEL <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csel_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -50,22 +58,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSINC <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
public void Csinc_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "CSINC <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csinc_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -74,22 +83,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSINC <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
public void Csinc_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CSINC <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csinc_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -98,22 +108,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSINV <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
public void Csinv_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "CSINV <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csinv_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -122,22 +133,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSINV <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
public void Csinv_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CSINV <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csinv_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -146,22 +158,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSNEG <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
public void Csneg_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "CSNEG <Xd>, <Xn>, <Xm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csneg_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -170,22 +183,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("CSNEG <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
public void Csneg_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "CSNEG <Wd>, <Wn>, <Wm>, <cond>")]
|
||||
[PairwiseData]
|
||||
public void Csneg_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
|
|
@ -194,7 +208,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= ((cond & 15) << 12);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x31: w31);
|
||||
|
||||
|
|
|
|||
|
|
@ -4,12 +4,17 @@ using ARMeilleure.State;
|
|||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Misc")]
|
||||
public sealed class CpuTestMisc : CpuTest
|
||||
{
|
||||
public CpuTestMisc(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Misc
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -63,44 +68,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noNaNs = false;
|
||||
|
||||
#region "AluImm & Csel"
|
||||
private static readonly ulong[] _testDataXn =
|
||||
{
|
||||
0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul,
|
||||
};
|
||||
|
||||
private static readonly uint[] _testDataWn =
|
||||
{
|
||||
0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
|
||||
private static readonly uint[] _testDataImm =
|
||||
{
|
||||
0u, 4095u,
|
||||
};
|
||||
|
||||
private static readonly uint[] _testDataShift =
|
||||
{
|
||||
0b00u, 0b01u,
|
||||
};
|
||||
|
||||
private static readonly uint[] _testDataCond =
|
||||
{
|
||||
0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, // GT, LE>
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<ulong, uint, uint, uint> TestMatrixData_64bit = new(_testDataXn, _testDataImm, _testDataShift, _testDataCond);
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint> TestMatrixData_32bit = new(_testDataWn, _testDataImm, _testDataShift, _testDataCond);
|
||||
|
||||
public static readonly RangeTheoryData<uint> TestRangeData = new(0u, 92u, 1u);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestMatrixData_64bit))]
|
||||
public void Adds_Csinc_64bit(ulong xn, uint imm, uint shift, uint cond)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Adds_Csinc_64bit([CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u)] uint cond) // GT, LE>
|
||||
{
|
||||
uint opCmn = 0xB100001F; // ADDS X31, X0, #0, LSL #0 -> CMN X0, #0, LSL #0
|
||||
uint opCset = 0x9A9F07E0; // CSINC X0, X31, X31, EQ -> CSET X0, NE
|
||||
|
|
@ -117,9 +94,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestMatrixData_32bit))]
|
||||
public void Adds_Csinc_32bit(uint wn, uint imm, uint shift, uint cond)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Adds_Csinc_32bit([CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u)] uint cond) // GT, LE>
|
||||
{
|
||||
uint opCmn = 0x3100001F; // ADDS W31, W0, #0, LSL #0 -> CMN W0, #0, LSL #0
|
||||
uint opCset = 0x1A9F07E0; // CSINC W0, W31, W31, EQ -> CSET W0, NE
|
||||
|
|
@ -136,9 +120,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestMatrixData_64bit))]
|
||||
public void Subs_Csinc_64bit(ulong xn, uint imm, uint shift, uint cond)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Subs_Csinc_64bit([CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u)] uint cond) // GT, LE>
|
||||
{
|
||||
uint opCmp = 0xF100001F; // SUBS X31, X0, #0, LSL #0 -> CMP X0, #0, LSL #0
|
||||
uint opCset = 0x9A9F07E0; // CSINC X0, X31, X31, EQ -> CSET X0, NE
|
||||
|
|
@ -155,9 +146,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestMatrixData_32bit))]
|
||||
public void Subs_Csinc_32bit(uint wn, uint imm, uint shift, uint cond)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Subs_Csinc_32bit([CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0u, 4095u)] uint imm,
|
||||
[CombinatorialValues(0b00u, 0b01u)] uint shift, // <LSL #0, LSL #12>
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u)] uint cond) // GT, LE>
|
||||
{
|
||||
uint opCmp = 0x7100001F; // SUBS W31, W0, #0, LSL #0 -> CMP W0, #0, LSL #0
|
||||
uint opCset = 0x1A9F07E0; // CSINC W0, W31, W31, EQ -> CSET W0, NE
|
||||
|
|
@ -303,8 +301,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
[Theory(Skip = "The Tester supports only one return point.")]
|
||||
[MemberData(nameof(TestRangeData))]
|
||||
public void MiscF(uint a)
|
||||
[CombinatorialData]
|
||||
public void MiscF([CombinatorialRange(0u, 92u, 1u)] uint a)
|
||||
{
|
||||
static ulong Fn(uint n)
|
||||
{
|
||||
|
|
@ -423,40 +421,28 @@ namespace Ryujinx.Tests.Cpu
|
|||
Assert.Equal(a, context.GetX(0));
|
||||
}
|
||||
|
||||
private static readonly ulong[] _testDataMisc4Displacement =
|
||||
{
|
||||
0ul, 1ul, 2ul, 3ul,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<ulong, ulong, ulong, ulong> TestDataMisc4 = new(_1S_F_(), _1S_F_(), _1S_F_(), _testDataMisc4Displacement);
|
||||
|
||||
// This test used to be skipped unless explicitly executed
|
||||
[SkippableTheory]
|
||||
[MemberData(nameof(TestDataMisc4))]
|
||||
public void Misc4(ulong a, ulong b, ulong c, ulong displacement)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Misc4([CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong b,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong c,
|
||||
[CombinatorialValues(0ul, 1ul, 2ul, 3ul)] ulong displacement)
|
||||
{
|
||||
Skip.IfNot(BitConverter.IsLittleEndian);
|
||||
|
||||
byte[] data = new byte[1];
|
||||
|
||||
for (ulong gapOffset = 0; gapOffset < displacement; gapOffset++)
|
||||
{
|
||||
Random.Shared.NextBytes(data);
|
||||
SetWorkingMemory(gapOffset, data[0]);
|
||||
SetWorkingMemory(gapOffset, Random.Shared.NextByte());
|
||||
}
|
||||
|
||||
SetWorkingMemory(0x0 + displacement, BitConverter.GetBytes((uint)b));
|
||||
|
||||
SetWorkingMemory(0x4 + displacement, BitConverter.GetBytes((uint)c));
|
||||
|
||||
Random.Shared.NextBytes(data);
|
||||
SetWorkingMemory(0x8 + displacement, data[0]);
|
||||
Random.Shared.NextBytes(data);
|
||||
SetWorkingMemory(0x9 + displacement, data[0]);
|
||||
Random.Shared.NextBytes(data);
|
||||
SetWorkingMemory(0xA + displacement, data[0]);
|
||||
Random.Shared.NextBytes(data);
|
||||
SetWorkingMemory(0xB + displacement, data[0]);
|
||||
SetWorkingMemory(0x8 + displacement, Random.Shared.NextByte());
|
||||
SetWorkingMemory(0x9 + displacement, Random.Shared.NextByte());
|
||||
SetWorkingMemory(0xA + displacement, Random.Shared.NextByte());
|
||||
SetWorkingMemory(0xB + displacement, Random.Shared.NextByte());
|
||||
|
||||
SetContext(
|
||||
x0: DataBaseAddress + displacement,
|
||||
|
|
@ -480,12 +466,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly EnumerableTheoryData<ulong> TestDataMisc5 = new(_1S_F_());
|
||||
|
||||
// This test used to be skipped unless explicitly executed
|
||||
[Theory]
|
||||
[MemberData(nameof(TestDataMisc5))]
|
||||
public void Misc5(ulong a)
|
||||
[CombinatorialData]
|
||||
public void Misc5([CombinatorialMemberData(nameof(_1S_F_))] ulong a)
|
||||
{
|
||||
SetContext(
|
||||
v0: MakeVectorE0E1(a, Random.Shared.NextULong()),
|
||||
|
|
|
|||
|
|
@ -4,12 +4,17 @@ using ARMeilleure.State;
|
|||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Misc32")]
|
||||
public sealed class CpuTestMisc32 : CpuTest32
|
||||
{
|
||||
public CpuTestMisc32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Misc32
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -62,17 +67,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
private static readonly bool[] _testData_bool =
|
||||
{
|
||||
false,
|
||||
true,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<ulong, ulong, bool, bool, bool> TestData = new(_1S_F_(), _1S_F_(), _testData_bool, _testData_bool, _testData_bool);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void Vmsr_Vcmp_Vmrs(ulong a, ulong b, bool mode1, bool mode2, bool mode3)
|
||||
[PairwiseData]
|
||||
public void Vmsr_Vcmp_Vmrs([CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong b,
|
||||
bool mode1,
|
||||
bool mode2,
|
||||
bool mode3)
|
||||
{
|
||||
V128 v4 = MakeVectorE0(a);
|
||||
V128 v5 = MakeVectorE0(b);
|
||||
|
|
|
|||
|
|
@ -1,107 +1,119 @@
|
|||
// #define Mov
|
||||
#define Mov
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Mov")]
|
||||
public sealed class CpuTestMov : CpuTest
|
||||
{
|
||||
public CpuTestMov(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Mov
|
||||
private const int RndCnt = 2;
|
||||
|
||||
[Test, Pairwise, Description("MOVK <Xd>, #<imm>{, LSL #<shift>}")]
|
||||
public void Movk_64bit([Values(0u, 31u)] uint rd,
|
||||
[Random(RndCnt)] ulong xd,
|
||||
[Values(0u, 65535u)] uint imm,
|
||||
[Values(0u, 16u, 32u, 48u)] uint shift)
|
||||
[SkippableTheory(DisplayName = "MOVK <Xd>, #<imm>{, LSL #<shift>}")]
|
||||
[PairwiseData]
|
||||
public void Movk_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong xd,
|
||||
[CombinatorialValues(0u, 65535u)] uint imm,
|
||||
[CombinatorialValues(0u, 16u, 32u, 48u)] uint shift)
|
||||
{
|
||||
uint opcode = 0xF2800000; // MOVK X0, #0, LSL #0
|
||||
opcode |= ((rd & 31) << 0);
|
||||
opcode |= (((shift / 16) & 3) << 21) | ((imm & 65535) << 5);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x0: xd, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MOVK <Wd>, #<imm>{, LSL #<shift>}")]
|
||||
public void Movk_32bit([Values(0u, 31u)] uint rd,
|
||||
[Random(RndCnt)] uint wd,
|
||||
[Values(0u, 65535u)] uint imm,
|
||||
[Values(0u, 16u)] uint shift)
|
||||
[SkippableTheory(DisplayName = "MOVK <Wd>, #<imm>{, LSL #<shift>}")]
|
||||
[PairwiseData]
|
||||
public void Movk_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialRandomData(Count = RndCnt)] uint wd,
|
||||
[CombinatorialValues(0u, 65535u)] uint imm,
|
||||
[CombinatorialValues(0u, 16u)] uint shift)
|
||||
{
|
||||
uint opcode = 0x72800000; // MOVK W0, #0, LSL #0
|
||||
opcode |= ((rd & 31) << 0);
|
||||
opcode |= (((shift / 16) & 3) << 21) | ((imm & 65535) << 5);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x0: wd, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MOVN <Xd>, #<imm>{, LSL #<shift>}")]
|
||||
public void Movn_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(0u, 65535u)] uint imm,
|
||||
[Values(0u, 16u, 32u, 48u)] uint shift)
|
||||
[SkippableTheory(DisplayName = "MOVN <Xd>, #<imm>{, LSL #<shift>}")]
|
||||
[PairwiseData]
|
||||
public void Movn_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(0u, 65535u)] uint imm,
|
||||
[CombinatorialValues(0u, 16u, 32u, 48u)] uint shift)
|
||||
{
|
||||
uint opcode = 0x92800000; // MOVN X0, #0, LSL #0
|
||||
opcode |= ((rd & 31) << 0);
|
||||
opcode |= (((shift / 16) & 3) << 21) | ((imm & 65535) << 5);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MOVN <Wd>, #<imm>{, LSL #<shift>}")]
|
||||
public void Movn_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(0u, 65535u)] uint imm,
|
||||
[Values(0u, 16u)] uint shift)
|
||||
[SkippableTheory(DisplayName = "MOVN <Wd>, #<imm>{, LSL #<shift>}")]
|
||||
[PairwiseData]
|
||||
public void Movn_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(0u, 65535u)] uint imm,
|
||||
[CombinatorialValues(0u, 16u)] uint shift)
|
||||
{
|
||||
uint opcode = 0x12800000; // MOVN W0, #0, LSL #0
|
||||
opcode |= ((rd & 31) << 0);
|
||||
opcode |= (((shift / 16) & 3) << 21) | ((imm & 65535) << 5);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MOVZ <Xd>, #<imm>{, LSL #<shift>}")]
|
||||
public void Movz_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(0u, 65535u)] uint imm,
|
||||
[Values(0u, 16u, 32u, 48u)] uint shift)
|
||||
[SkippableTheory(DisplayName = "MOVZ <Xd>, #<imm>{, LSL #<shift>}")]
|
||||
[PairwiseData]
|
||||
public void Movz_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(0u, 65535u)] uint imm,
|
||||
[CombinatorialValues(0u, 16u, 32u, 48u)] uint shift)
|
||||
{
|
||||
uint opcode = 0xD2800000; // MOVZ X0, #0, LSL #0
|
||||
opcode |= ((rd & 31) << 0);
|
||||
opcode |= (((shift / 16) & 3) << 21) | ((imm & 65535) << 5);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MOVZ <Wd>, #<imm>{, LSL #<shift>}")]
|
||||
public void Movz_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(0u, 65535u)] uint imm,
|
||||
[Values(0u, 16u)] uint shift)
|
||||
[SkippableTheory(DisplayName = "MOVZ <Wd>, #<imm>{, LSL #<shift>}")]
|
||||
[PairwiseData]
|
||||
public void Movz_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(0u, 65535u)] uint imm,
|
||||
[CombinatorialValues(0u, 16u)] uint shift)
|
||||
{
|
||||
uint opcode = 0x52800000; // MOVZ W0, #0, LSL #0
|
||||
opcode |= ((rd & 31) << 0);
|
||||
opcode |= (((shift / 16) & 3) << 21) | ((imm & 65535) << 5);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x31: w31);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,221 +1,237 @@
|
|||
// #define Mul
|
||||
#define Mul
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Mul")]
|
||||
public sealed class CpuTestMul : CpuTest
|
||||
{
|
||||
public CpuTestMul(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Mul
|
||||
[Test, Pairwise, Description("MADD <Xd>, <Xn>, <Xm>, <Xa>")]
|
||||
public void Madd_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "MADD <Xd>, <Xn>, <Xm>, <Xa>")]
|
||||
[PairwiseData]
|
||||
public void Madd_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xa)
|
||||
{
|
||||
uint opcode = 0x9B000000; // MADD X0, X0, X0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x3: xa, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MADD <Wd>, <Wn>, <Wm>, <Wa>")]
|
||||
public void Madd_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "MADD <Wd>, <Wn>, <Wm>, <Wa>")]
|
||||
[PairwiseData]
|
||||
public void Madd_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wa)
|
||||
{
|
||||
uint opcode = 0x1B000000; // MADD W0, W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x3: wa, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MSUB <Xd>, <Xn>, <Xm>, <Xa>")]
|
||||
public void Msub_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "MSUB <Xd>, <Xn>, <Xm>, <Xa>")]
|
||||
[PairwiseData]
|
||||
public void Msub_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xa)
|
||||
{
|
||||
uint opcode = 0x9B008000; // MSUB X0, X0, X0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x3: xa, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("MSUB <Wd>, <Wn>, <Wm>, <Wa>")]
|
||||
public void Msub_32bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "MSUB <Wd>, <Wn>, <Wm>, <Wa>")]
|
||||
[PairwiseData]
|
||||
public void Msub_32bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wa)
|
||||
{
|
||||
uint opcode = 0x1B008000; // MSUB W0, W0, W0, W0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x3: wa, x31: w31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMADDL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
public void Smaddl_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SMADDL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
[PairwiseData]
|
||||
public void Smaddl_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xa)
|
||||
{
|
||||
uint opcode = 0x9B200000; // SMADDL X0, W0, W0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x3: xa, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMADDL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
public void Umaddl_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "UMADDL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
[PairwiseData]
|
||||
public void Umaddl_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xa)
|
||||
{
|
||||
uint opcode = 0x9BA00000; // UMADDL X0, W0, W0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x3: xa, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMSUBL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
public void Smsubl_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "SMSUBL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
[PairwiseData]
|
||||
public void Smsubl_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xa)
|
||||
{
|
||||
uint opcode = 0x9B208000; // SMSUBL X0, W0, W0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x3: xa, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMSUBL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
public void Umsubl_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(3u, 31u)] uint ra,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[SkippableTheory(DisplayName = "UMSUBL <Xd>, <Wn>, <Wm>, <Xa>")]
|
||||
[PairwiseData]
|
||||
public void Umsubl_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(3u, 31u)] uint ra,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[Values(0x00000000u, 0x7FFFFFFFu,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xa)
|
||||
{
|
||||
uint opcode = 0x9BA08000; // UMSUBL X0, W0, W0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((ra & 31) << 10) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x2: wm, x3: xa, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMULH <Xd>, <Xn>, <Xm>")]
|
||||
public void Smulh_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "SMULH <Xd>, <Xn>, <Xm>")]
|
||||
[PairwiseData]
|
||||
public void Smulh_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm)
|
||||
{
|
||||
uint opcode = 0x9B407C00; // SMULH X0, X0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMULH <Xd>, <Xn>, <Xm>")]
|
||||
public void Umulh_64bit([Values(0u, 31u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[Values(2u, 31u)] uint rm,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[SkippableTheory(DisplayName = "UMULH <Xd>, <Xn>, <Xm>")]
|
||||
[PairwiseData]
|
||||
public void Umulh_64bit([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialValues(2u, 31u)] uint rm,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
|
||||
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
[CombinatorialValues(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
|
||||
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm)
|
||||
{
|
||||
uint opcode = 0x9BC07C00; // UMULH X0, X0, X0
|
||||
opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x2: xm, x31: x31);
|
||||
|
||||
|
|
|
|||
|
|
@ -2,12 +2,17 @@
|
|||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Mul32")]
|
||||
public sealed class CpuTestMul32 : CpuTest32
|
||||
{
|
||||
public CpuTestMul32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Mul32
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
|
|
@ -52,33 +57,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
private static readonly uint[] _testData_rn =
|
||||
{
|
||||
0u, 0xdu,
|
||||
};
|
||||
private static readonly uint[] _testData_rm =
|
||||
{
|
||||
1u, 0xdu,
|
||||
};
|
||||
private static readonly uint[] _testData_ra =
|
||||
{
|
||||
2u, 0xdu,
|
||||
};
|
||||
private static readonly uint[] _testData_rd =
|
||||
{
|
||||
3u, 0xdu,
|
||||
};
|
||||
private static readonly uint[] _testData_wn =
|
||||
{
|
||||
0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint, uint, uint> TestData_Smla = new(_Smlabb_Smlabt_Smlatb_Smlatt_(), _testData_rn, _testData_rm, _testData_ra, _testData_rd, _testData_wn, _testData_wn, _testData_wn);
|
||||
|
||||
[Theory(DisplayName = "SMLA<x><y> <Rd>, <Rn>, <Rm>, <Ra>")]
|
||||
[MemberData(nameof(TestData_Smla))]
|
||||
public void Smla___32bit(uint opcode, uint rn, uint rm, uint ra, uint rd, uint wn, uint wm, uint wa)
|
||||
[PairwiseData]
|
||||
public void Smla___32bit([CombinatorialMemberData(nameof(_Smlabb_Smlabt_Smlatb_Smlatt_))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rn,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rm,
|
||||
[CombinatorialValues(2u, 0xdu)] uint ra,
|
||||
[CombinatorialValues(3u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wa)
|
||||
{
|
||||
opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16);
|
||||
|
||||
|
|
@ -89,11 +80,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint, uint, uint> TestData_Smlaw = new(_Smlawb_Smlawt_(), _testData_rn, _testData_rm, _testData_ra, _testData_rd, _testData_wn, _testData_wn, _testData_wn);
|
||||
|
||||
[Theory(DisplayName = "SMLAW<x> <Rd>, <Rn>, <Rm>, <Ra>")]
|
||||
[MemberData(nameof(TestData_Smlaw))]
|
||||
public void Smlaw__32bit(uint opcode, uint rn, uint rm, uint ra, uint rd, uint wn, uint wm, uint wa)
|
||||
[PairwiseData]
|
||||
public void Smlaw__32bit([CombinatorialMemberData(nameof(_Smlawb_Smlawt_))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rn,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rm,
|
||||
[CombinatorialValues(2u, 0xdu)] uint ra,
|
||||
[CombinatorialValues(3u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wa)
|
||||
{
|
||||
opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16);
|
||||
|
||||
|
|
@ -104,11 +103,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint> TestData_Smul = new(_Smulbb_Smulbt_Smultb_Smultt_(), _testData_rn, _testData_rm, _testData_rd, _testData_wn, _testData_wn);
|
||||
|
||||
[Theory(DisplayName = "SMUL<x><y> <Rd>, <Rn>, <Rm>")]
|
||||
[MemberData(nameof(TestData_Smul))]
|
||||
public void Smul___32bit(uint opcode, uint rn, uint rm, uint rd, uint wn, uint wm)
|
||||
[PairwiseData]
|
||||
public void Smul___32bit([CombinatorialMemberData(nameof(_Smulbb_Smulbt_Smultb_Smultt_))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rn,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rm,
|
||||
[CombinatorialValues(2u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm)
|
||||
{
|
||||
opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16);
|
||||
|
||||
|
|
@ -119,11 +123,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, uint, uint> TestData_Smulw = new(_Smulwb_Smulwt_(), _testData_rn, _testData_rm, _testData_rd, _testData_wn, _testData_wn);
|
||||
|
||||
[Theory(DisplayName = "SMULW<x> <Rd>, <Rn>, <Rm>")]
|
||||
[MemberData(nameof(TestData_Smulw))]
|
||||
public void Smulw__32bit(uint opcode, uint rn, uint rm, uint rd, uint wn, uint wm)
|
||||
[PairwiseData]
|
||||
public void Smulw__32bit([CombinatorialMemberData(nameof(_Smulwb_Smulwt_))] uint opcode,
|
||||
[CombinatorialValues(0u, 0xdu)] uint rn,
|
||||
[CombinatorialValues(1u, 0xdu)] uint rm,
|
||||
[CombinatorialValues(2u, 0xdu)] uint rd,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wn,
|
||||
[CombinatorialValues(0x00000000u, 0x7FFFFFFFu,
|
||||
0x80000000u, 0xFFFFFFFFu)] uint wm)
|
||||
{
|
||||
opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16);
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,12 +1,20 @@
|
|||
// #define Simd32
|
||||
#define Simd32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Simd32")]
|
||||
public sealed class CpuTestSimd32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimd32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Simd32
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
|
|
@ -74,7 +82,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
|
|
@ -181,16 +189,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Test, Pairwise, Description("SHA256SU0.32 <Qd>, <Qm>")]
|
||||
public void Sha256su0_V([Values(0xF3BA03C0u)] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(2u)] uint rm,
|
||||
[Values(0x9BCBBF7443FB4F91ul)] ulong z0,
|
||||
[Values(0x482C58A58CBCBD59ul)] ulong z1,
|
||||
[Values(0xA0099B803625F82Aul)] ulong a0,
|
||||
[Values(0x1AA3B0B4E1AB4C8Cul)] ulong a1,
|
||||
[Values(0x29A44D72598F15F3ul)] ulong resultL,
|
||||
[Values(0x74CED221E2793F07ul)] ulong resultH)
|
||||
[Theory(DisplayName = "SHA256SU0.32 <Qd>, <Qm>")]
|
||||
[PairwiseData]
|
||||
public void Sha256su0_V([CombinatorialValues(0xF3BA03C0u)] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u)] uint rm,
|
||||
[CombinatorialValues(0x9BCBBF7443FB4F91ul)] ulong z0,
|
||||
[CombinatorialValues(0x482C58A58CBCBD59ul)] ulong z1,
|
||||
[CombinatorialValues(0xA0099B803625F82Aul)] ulong a0,
|
||||
[CombinatorialValues(0x1AA3B0B4E1AB4C8Cul)] ulong a1,
|
||||
[CombinatorialValues(0x29A44D72598F15F3ul)] ulong resultL,
|
||||
[CombinatorialValues(0x74CED221E2793F07ul)] ulong resultH)
|
||||
{
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
|
|
@ -202,22 +211,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
|
||||
// Unicorn does not yet support hash instructions in A32.
|
||||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vabs_Vneg_Vpaddl_V_I([ValueSource(nameof(_Vabs_Vneg_Vpaddl_I_))] uint opcode,
|
||||
[Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong z,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong b,
|
||||
[Values(0u, 1u, 2u)] uint size, // <S8, S16, S32>
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vabs_Vneg_Vpaddl_V_I([CombinatorialMemberData(nameof(_Vabs_Vneg_Vpaddl_I_))] uint opcode,
|
||||
[CombinatorialRange(0u, 3u, 1u)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size, // <S8, S16, S32>
|
||||
bool q)
|
||||
{
|
||||
if (q)
|
||||
{
|
||||
|
|
@ -242,13 +252,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vabs_Vneg_V_F32([ValueSource(nameof(_Vabs_Vneg_F_))] uint opcode,
|
||||
[Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vabs_Vneg_V_F32([CombinatorialMemberData(nameof(_Vabs_Vneg_F_))] uint opcode,
|
||||
[CombinatorialRange(0u, 3u, 1u)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b,
|
||||
bool q)
|
||||
{
|
||||
if (q)
|
||||
{
|
||||
|
|
@ -271,11 +282,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VCNT.8 D0, D0 | VCNT.8 Q0, Q0")]
|
||||
public void Vcnt([Values(0u, 1u)] uint rd,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[ValueSource(nameof(_GenPopCnt8B_))] ulong d0,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VCNT.8 D0, D0 | VCNT.8 Q0, Q0")]
|
||||
[PairwiseData]
|
||||
public void Vcnt([CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_GenPopCnt8B_))] ulong d0,
|
||||
bool q)
|
||||
{
|
||||
ulong d1 = ~d0; // It's expensive to have a second generator.
|
||||
|
||||
|
|
@ -299,13 +311,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vmovn_V([Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong z,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint op,
|
||||
[Values(0u, 1u, 2u)] uint size) // <S8, S16, S32>
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vmovn_V([CombinatorialRange(0u, 3u, 1u)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint op,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size) // <S8, S16, S32>
|
||||
{
|
||||
rm >>= 1;
|
||||
rm <<= 1;
|
||||
|
|
|
|||
|
|
@ -1,21 +1,42 @@
|
|||
// #define SimdCrypto
|
||||
#define SimdCrypto
|
||||
// https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
public class CpuTestSimdCrypto : CpuTest
|
||||
{
|
||||
public CpuTestSimdCrypto(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdCrypto
|
||||
|
||||
[Test, Description("AESD <Vd>.16B, <Vn>.16B")]
|
||||
public void Aesd_V([Values(0u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[Values(0x7B5B546573745665ul)] ulong valueH,
|
||||
[Values(0x63746F725D53475Dul)] ulong valueL,
|
||||
[Random(2)] ulong roundKeyH,
|
||||
[Random(2)] ulong roundKeyL,
|
||||
[Values(0x8DCAB9BC035006BCul)] ulong resultH,
|
||||
[Values(0x8F57161E00CAFD8Dul)] ulong resultL)
|
||||
public static readonly ulong[] RandomRoundKeysH =
|
||||
{
|
||||
Random.Shared.NextULong(),
|
||||
Random.Shared.NextULong(),
|
||||
};
|
||||
public static readonly ulong[] RandomRoundKeysL =
|
||||
{
|
||||
Random.Shared.NextULong(),
|
||||
Random.Shared.NextULong(),
|
||||
};
|
||||
|
||||
[SkippableTheory(DisplayName = "AESD <Vd>.16B, <Vn>.16B")]
|
||||
[CombinatorialData]
|
||||
public void Aesd_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(0x7B5B546573745665ul)] ulong valueH,
|
||||
[CombinatorialValues(0x63746F725D53475Dul)] ulong valueL,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysH))] ulong roundKeyH,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysL))] ulong roundKeyL,
|
||||
[CombinatorialValues(0x8DCAB9BC035006BCul)] ulong resultH,
|
||||
[CombinatorialValues(0x8F57161E00CAFD8Dul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0x4E285800; // AESD V0.16B, V0.16B
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -27,27 +48,28 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(roundKeyL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(roundKeyH));
|
||||
Assert.Equal(roundKeyL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(roundKeyH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Description("AESE <Vd>.16B, <Vn>.16B")]
|
||||
public void Aese_V([Values(0u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[Values(0x7B5B546573745665ul)] ulong valueH,
|
||||
[Values(0x63746F725D53475Dul)] ulong valueL,
|
||||
[Random(2)] ulong roundKeyH,
|
||||
[Random(2)] ulong roundKeyL,
|
||||
[Values(0x8F92A04DFBED204Dul)] ulong resultH,
|
||||
[Values(0x4C39B1402192A84Cul)] ulong resultL)
|
||||
[SkippableTheory(DisplayName = "AESE <Vd>.16B, <Vn>.16B")]
|
||||
[CombinatorialData]
|
||||
public void Aese_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(0x7B5B546573745665ul)] ulong valueH,
|
||||
[CombinatorialValues(0x63746F725D53475Dul)] ulong valueL,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysH))] ulong roundKeyH,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysL))] ulong roundKeyL,
|
||||
[CombinatorialValues(0x8F92A04DFBED204Dul)] ulong resultH,
|
||||
[CombinatorialValues(0x4C39B1402192A84Cul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0x4E284800; // AESE V0.16B, V0.16B
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -59,25 +81,26 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(roundKeyL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(roundKeyH));
|
||||
Assert.Equal(roundKeyL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(roundKeyH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Description("AESIMC <Vd>.16B, <Vn>.16B")]
|
||||
public void Aesimc_V([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(0x8DCAB9DC035006BCul)] ulong valueH,
|
||||
[Values(0x8F57161E00CAFD8Dul)] ulong valueL,
|
||||
[Values(0xD635A667928B5EAEul)] ulong resultH,
|
||||
[Values(0xEEC9CC3BC55F5777ul)] ulong resultL)
|
||||
[SkippableTheory(DisplayName = "AESIMC <Vd>.16B, <Vn>.16B")]
|
||||
[CombinatorialData]
|
||||
public void Aesimc_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(0x8DCAB9DC035006BCul)] ulong valueH,
|
||||
[CombinatorialValues(0x8F57161E00CAFD8Dul)] ulong valueL,
|
||||
[CombinatorialValues(0xD635A667928B5EAEul)] ulong resultH,
|
||||
[CombinatorialValues(0xEEC9CC3BC55F5777ul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0x4E287800; // AESIMC V0.16B, V0.16B
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -91,28 +114,29 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
if (rn == 1u)
|
||||
{
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(valueL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(valueH));
|
||||
Assert.Equal(valueL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(valueH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
}
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Description("AESMC <Vd>.16B, <Vn>.16B")]
|
||||
public void Aesmc_V([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(0x627A6F6644B109C8ul)] ulong valueH,
|
||||
[Values(0x2B18330A81C3B3E5ul)] ulong valueL,
|
||||
[Values(0x7B5B546573745665ul)] ulong resultH,
|
||||
[Values(0x63746F725D53475Dul)] ulong resultL)
|
||||
[SkippableTheory(DisplayName = "AESMC <Vd>.16B, <Vn>.16B")]
|
||||
[CombinatorialData]
|
||||
public void Aesmc_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(0x627A6F6644B109C8ul)] ulong valueH,
|
||||
[CombinatorialValues(0x2B18330A81C3B3E5ul)] ulong valueL,
|
||||
[CombinatorialValues(0x7B5B546573745665ul)] ulong resultH,
|
||||
[CombinatorialValues(0x63746F725D53475Dul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0x4E286800; // AESMC V0.16B, V0.16B
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
|
@ -126,15 +150,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
if (rn == 1u)
|
||||
{
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(valueL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(valueH));
|
||||
Assert.Equal(valueL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(valueH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,21 +1,42 @@
|
|||
// #define SimdCrypto32
|
||||
#define SimdCrypto32
|
||||
// https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
public class CpuTestSimdCrypto32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdCrypto32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdCrypto32
|
||||
|
||||
[Test, Description("AESD.8 <Qd>, <Qm>")]
|
||||
public void Aesd_V([Values(0u)] uint rd,
|
||||
[Values(2u)] uint rm,
|
||||
[Values(0x7B5B546573745665ul)] ulong valueH,
|
||||
[Values(0x63746F725D53475Dul)] ulong valueL,
|
||||
[Random(2)] ulong roundKeyH,
|
||||
[Random(2)] ulong roundKeyL,
|
||||
[Values(0x8DCAB9BC035006BCul)] ulong resultH,
|
||||
[Values(0x8F57161E00CAFD8Dul)] ulong resultL)
|
||||
public static readonly ulong[] RandomRoundKeysH =
|
||||
{
|
||||
Random.Shared.NextULong(),
|
||||
Random.Shared.NextULong(),
|
||||
};
|
||||
public static readonly ulong[] RandomRoundKeysL =
|
||||
{
|
||||
Random.Shared.NextULong(),
|
||||
Random.Shared.NextULong(),
|
||||
};
|
||||
|
||||
[Theory(DisplayName = "AESD.8 <Qd>, <Qm>")]
|
||||
[CombinatorialData]
|
||||
public void Aesd_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u)] uint rm,
|
||||
[CombinatorialValues(0x7B5B546573745665ul)] ulong valueH,
|
||||
[CombinatorialValues(0x63746F725D53475Dul)] ulong valueL,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysH))] ulong roundKeyH,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysL))] ulong roundKeyL,
|
||||
[CombinatorialValues(0x8DCAB9BC035006BCul)] ulong resultH,
|
||||
[CombinatorialValues(0x8F57161E00CAFD8Dul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0xf3b00340; // AESD.8 Q0, Q0
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
|
|
@ -28,28 +49,29 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(roundKeyL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(roundKeyH));
|
||||
Assert.Equal(roundKeyL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(roundKeyH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
|
||||
// Unicorn does not yet support crypto instructions in A32.
|
||||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Description("AESE.8 <Qd>, <Qm>")]
|
||||
public void Aese_V([Values(0u)] uint rd,
|
||||
[Values(2u)] uint rm,
|
||||
[Values(0x7B5B546573745665ul)] ulong valueH,
|
||||
[Values(0x63746F725D53475Dul)] ulong valueL,
|
||||
[Random(2)] ulong roundKeyH,
|
||||
[Random(2)] ulong roundKeyL,
|
||||
[Values(0x8F92A04DFBED204Dul)] ulong resultH,
|
||||
[Values(0x4C39B1402192A84Cul)] ulong resultL)
|
||||
[Theory(DisplayName = "AESE.8 <Qd>, <Qm>")]
|
||||
[CombinatorialData]
|
||||
public void Aese_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u)] uint rm,
|
||||
[CombinatorialValues(0x7B5B546573745665ul)] ulong valueH,
|
||||
[CombinatorialValues(0x63746F725D53475Dul)] ulong valueL,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysH))] ulong roundKeyH,
|
||||
[CombinatorialMemberData(nameof(RandomRoundKeysL))] ulong roundKeyL,
|
||||
[CombinatorialValues(0x8F92A04DFBED204Dul)] ulong resultH,
|
||||
[CombinatorialValues(0x4C39B1402192A84Cul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0xf3b00300; // AESE.8 Q0, Q0
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
|
|
@ -62,26 +84,27 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(roundKeyL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(roundKeyH));
|
||||
Assert.Equal(roundKeyL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(roundKeyH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
|
||||
// Unicorn does not yet support crypto instructions in A32.
|
||||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Description("AESIMC.8 <Qd>, <Qm>")]
|
||||
public void Aesimc_V([Values(0u)] uint rd,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0x8DCAB9DC035006BCul)] ulong valueH,
|
||||
[Values(0x8F57161E00CAFD8Dul)] ulong valueL,
|
||||
[Values(0xD635A667928B5EAEul)] ulong resultH,
|
||||
[Values(0xEEC9CC3BC55F5777ul)] ulong resultL)
|
||||
[Theory(DisplayName = "AESIMC.8 <Qd>, <Qm>")]
|
||||
[CombinatorialData]
|
||||
public void Aesimc_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0x8DCAB9DC035006BCul)] ulong valueH,
|
||||
[CombinatorialValues(0x8F57161E00CAFD8Dul)] ulong valueL,
|
||||
[CombinatorialValues(0xD635A667928B5EAEul)] ulong resultH,
|
||||
[CombinatorialValues(0xEEC9CC3BC55F5777ul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0xf3b003c0; // AESIMC.8 Q0, Q0
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
|
|
@ -97,15 +120,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
if (rm == 2u)
|
||||
{
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(valueL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(valueH));
|
||||
Assert.Equal(valueL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(valueH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
}
|
||||
|
||||
|
|
@ -113,13 +136,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Description("AESMC.8 <Qd>, <Qm>")]
|
||||
public void Aesmc_V([Values(0u)] uint rd,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0x627A6F6644B109C8ul)] ulong valueH,
|
||||
[Values(0x2B18330A81C3B3E5ul)] ulong valueL,
|
||||
[Values(0x7B5B546573745665ul)] ulong resultH,
|
||||
[Values(0x63746F725D53475Dul)] ulong resultL)
|
||||
[Theory(DisplayName = "AESMC.8 <Qd>, <Qm>")]
|
||||
[CombinatorialData]
|
||||
public void Aesmc_V([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0x627A6F6644B109C8ul)] ulong valueH,
|
||||
[CombinatorialValues(0x2B18330A81C3B3E5ul)] ulong valueL,
|
||||
[CombinatorialValues(0x7B5B546573745665ul)] ulong resultH,
|
||||
[CombinatorialValues(0x63746F725D53475Dul)] ulong resultL)
|
||||
{
|
||||
uint opcode = 0xf3b00380; // AESMC.8 Q0, Q0
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
|
|
@ -135,15 +159,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
if (rm == 2u)
|
||||
{
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(valueL));
|
||||
Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(valueH));
|
||||
Assert.Equal(valueL, GetVectorE0(context.GetV(1)));
|
||||
Assert.Equal(valueH, GetVectorE1(context.GetV(1)));
|
||||
});
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdCvt
|
||||
#define SimdCvt
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdCvt")]
|
||||
public sealed class CpuTestSimdCvt : CpuTest
|
||||
{
|
||||
public CpuTestSimdCvt(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdCvt
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -85,16 +93,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
|
||||
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits(
|
||||
(int)TestContext.CurrentContext.Random.NextUInt());
|
||||
(int)Random.Shared.NextUInt());
|
||||
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(
|
||||
(long)TestContext.CurrentContext.Random.NextULong());
|
||||
(long)Random.Shared.NextULong());
|
||||
ulong rnd3 = (uint)BitConverter.SingleToInt32Bits(
|
||||
TestContext.CurrentContext.Random.NextUInt());
|
||||
Random.Shared.NextUInt());
|
||||
ulong rnd4 = (uint)BitConverter.SingleToInt32Bits(
|
||||
TestContext.CurrentContext.Random.NextULong());
|
||||
Random.Shared.NextULong());
|
||||
|
||||
ulong rnd5 = GenNormalS();
|
||||
ulong rnd6 = GenSubnormalS();
|
||||
|
|
@ -169,13 +177,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong rnd1 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||
(int)TestContext.CurrentContext.Random.NextUInt());
|
||||
(int)Random.Shared.NextUInt());
|
||||
ulong rnd2 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||
(long)TestContext.CurrentContext.Random.NextULong());
|
||||
(long)Random.Shared.NextULong());
|
||||
ulong rnd3 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||
TestContext.CurrentContext.Random.NextUInt());
|
||||
Random.Shared.NextUInt());
|
||||
ulong rnd4 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||
TestContext.CurrentContext.Random.NextULong());
|
||||
Random.Shared.NextULong());
|
||||
|
||||
ulong rnd5 = GenNormalD();
|
||||
ulong rnd6 = GenSubnormalD();
|
||||
|
|
@ -371,17 +379,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_AMPZ_SU_Gp_SW([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_SW_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1S_F_WX_))] ulong a)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_AMPZ_SU_Gp_SW([CombinatorialMemberData(nameof(_F_Cvt_AMPZ_SU_Gp_SW_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1S_F_WX_))] ulong a)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -389,16 +397,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_AMPZ_SU_Gp_SX([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_SX_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1S_F_WX_))] ulong a)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_AMPZ_SU_Gp_SX([CombinatorialMemberData(nameof(_F_Cvt_AMPZ_SU_Gp_SX_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1S_F_WX_))] ulong a)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x31: x31, v1: v1);
|
||||
|
|
@ -406,17 +414,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_AMPZ_SU_Gp_DW([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_DW_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1D_F_WX_))] ulong a)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_AMPZ_SU_Gp_DW([CombinatorialMemberData(nameof(_F_Cvt_AMPZ_SU_Gp_DW_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_F_WX_))] ulong a)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -424,16 +432,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_AMPZ_SU_Gp_DX([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_DX_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1D_F_WX_))] ulong a)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_AMPZ_SU_Gp_DX([CombinatorialMemberData(nameof(_F_Cvt_AMPZ_SU_Gp_DX_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_F_WX_))] ulong a)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x31: x31, v1: v1);
|
||||
|
|
@ -441,21 +449,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_SW([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_SW_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1S_F_WX_))] ulong a,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_SW([CombinatorialMemberData(nameof(_F_Cvt_Z_SU_Gp_Fixed_SW_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1S_F_WX_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -463,20 +471,20 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_SX([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_SX_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1S_F_WX_))] ulong a,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_SX([CombinatorialMemberData(nameof(_F_Cvt_Z_SU_Gp_Fixed_SX_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1S_F_WX_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x31: x31, v1: v1);
|
||||
|
|
@ -484,21 +492,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_DW([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_DW_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1D_F_WX_))] ulong a,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_DW([CombinatorialMemberData(nameof(_F_Cvt_Z_SU_Gp_Fixed_DW_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_F_WX_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -506,20 +514,20 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_DX([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_DX_))] uint opcodes,
|
||||
[Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1D_F_WX_))] ulong a,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_Z_SU_Gp_Fixed_DX([CombinatorialMemberData(nameof(_F_Cvt_Z_SU_Gp_Fixed_DX_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_F_WX_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
SingleOpcode(opcodes, x31: x31, v1: v1);
|
||||
|
|
@ -527,17 +535,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_WS([ValueSource(nameof(_SU_Cvt_F_Gp_WS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_WS([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_WS_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -545,17 +553,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_WD([ValueSource(nameof(_SU_Cvt_F_Gp_WD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_WD([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_WD_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -563,17 +571,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_XS([ValueSource(nameof(_SU_Cvt_F_Gp_XS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_XS([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_XS_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_X_))] ulong xn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
|
|
@ -581,17 +589,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_XD([ValueSource(nameof(_SU_Cvt_F_Gp_XD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_XD([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_XD_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_X_))] ulong xn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
|
|
@ -599,21 +607,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_WS([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_WS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_Fixed_WS([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_Fixed_WS_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -621,21 +629,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_WD([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_WD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_Fixed_WD([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_Fixed_WD_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -643,21 +651,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_XS([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_XS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_Fixed_XS([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_Fixed_XS_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_X_))] ulong xn,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
|
|
@ -665,21 +673,21 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_XD([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_XD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_Gp_Fixed_XD([CombinatorialMemberData(nameof(_SU_Cvt_F_Gp_Fixed_XD_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_X_))] ulong xn,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint scale = (64u - fBits) & 0x3Fu;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdCvt32
|
||||
#define SimdCvt32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdCvt32")]
|
||||
public sealed class CpuTestSimdCvt32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdCvt32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdCvt32
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
|
|
@ -64,7 +72,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
|
|
@ -162,15 +170,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT.<dt>.F32 <Sd>, <Sm>")]
|
||||
public void Vcvt_F32_I32([Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s0,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s1,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s2,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s3,
|
||||
[Values] bool unsigned) // <U32, S32>
|
||||
[Theory(DisplayName = "VCVT.<dt>.F32 <Sd>, <Sm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_F32_I32([CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s0,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s1,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s2,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s3,
|
||||
bool unsigned) // <U32, S32>
|
||||
{
|
||||
uint opcode = 0xeebc0ac0u; // VCVT.U32.F32 S0, S0
|
||||
|
||||
|
|
@ -189,13 +197,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT.<dt>.F64 <Sd>, <Dm>")]
|
||||
public void Vcvt_F64_I32([Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d0,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d1,
|
||||
[Values] bool unsigned) // <U32, S32>
|
||||
[Theory(DisplayName = "VCVT.<dt>.F64 <Sd>, <Dm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_F64_I32([CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d1,
|
||||
bool unsigned) // <U32, S32>
|
||||
{
|
||||
uint opcode = 0xeebc0bc0u; // VCVT.U32.F64 S0, D0
|
||||
|
||||
|
|
@ -214,16 +222,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT.F32.<dt> <Sd>, <Sm>")]
|
||||
public void Vcvt_I32_F32([Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1S_))] uint s0,
|
||||
[ValueSource(nameof(_1S_))] uint s1,
|
||||
[ValueSource(nameof(_1S_))] uint s2,
|
||||
[ValueSource(nameof(_1S_))] uint s3,
|
||||
[Values] bool unsigned, // <U32, S32>
|
||||
[Values(RMode.Rn)] RMode rMode)
|
||||
[Theory(DisplayName = "VCVT.F32.<dt> <Sd>, <Sm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_I32_F32([CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s0,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s1,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s2,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s3,
|
||||
bool unsigned, // <U32, S32>
|
||||
[CombinatorialValues(RMode.Rn)] RMode rMode)
|
||||
{
|
||||
uint opcode = 0xeeb80a40u; // VCVT.F32.U32 S0, S0
|
||||
|
||||
|
|
@ -244,16 +252,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT.F64.<dt> <Dd>, <Sm>")]
|
||||
public void Vcvt_I32_F64([Values(0u, 1u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1S_))] uint s0,
|
||||
[ValueSource(nameof(_1S_))] uint s1,
|
||||
[ValueSource(nameof(_1S_))] uint s2,
|
||||
[ValueSource(nameof(_1S_))] uint s3,
|
||||
[Values] bool unsigned, // <U32, S32>
|
||||
[Values(RMode.Rn)] RMode rMode)
|
||||
[Theory(DisplayName = "VCVT.F64.<dt> <Dd>, <Sm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_I32_F64([CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s0,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s1,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s2,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s3,
|
||||
bool unsigned, // <U32, S32>
|
||||
[CombinatorialValues(RMode.Rn)] RMode rMode)
|
||||
{
|
||||
uint opcode = 0xeeb80b40u; // VCVT.F64.U32 D0, S0
|
||||
|
||||
|
|
@ -274,16 +282,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void Vrint_AMNP_V_F32([ValueSource(nameof(_Vrint_AMNP_V_F32_))] uint opcode,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d1,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d2,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d3,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vrint_AMNP_V_F32([CombinatorialMemberData(nameof(_Vrint_AMNP_V_F32_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d1,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d2,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d3,
|
||||
bool q)
|
||||
{
|
||||
if (q)
|
||||
{
|
||||
|
|
@ -306,14 +314,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VRINTX.F<size> <Sd>, <Sm>")]
|
||||
public void Vrintx_S([Values(0u, 1u)] uint rd,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[Values(2u, 3u)] uint size,
|
||||
[ValueSource(nameof(_1D_F_))] ulong s0,
|
||||
[ValueSource(nameof(_1D_F_))] ulong s1,
|
||||
[ValueSource(nameof(_1D_F_))] ulong s2,
|
||||
[Values(RMode.Rn, RMode.Rm, RMode.Rp)] RMode rMode)
|
||||
[Theory(DisplayName = "VRINTX.F<size> <Sd>, <Sm>")]
|
||||
[PairwiseData]
|
||||
public void Vrintx_S([CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialValues(2u, 3u)] uint size,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong s0,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong s1,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong s2,
|
||||
[CombinatorialValues(RMode.Rn, RMode.Rm, RMode.Rp)] RMode rMode)
|
||||
{
|
||||
uint opcode = 0xEB70A40;
|
||||
V128 v0, v1, v2;
|
||||
|
|
@ -342,15 +351,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT<top>.F16.F32 <Sd>, <Dm>")]
|
||||
public void Vcvt_F32_F16([Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1S_))] uint s0,
|
||||
[ValueSource(nameof(_1S_))] uint s1,
|
||||
[ValueSource(nameof(_1S_))] uint s2,
|
||||
[ValueSource(nameof(_1S_))] uint s3,
|
||||
[Values] bool top)
|
||||
[Theory(DisplayName = "VCVT<top>.F16.F32 <Sd>, <Dm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_F32_F16([CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s0,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s1,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s2,
|
||||
[CombinatorialMemberData(nameof(_1S_))] uint s3,
|
||||
bool top)
|
||||
{
|
||||
uint opcode = 0xeeb30a40; // VCVTB.F16.F32 S0, D0
|
||||
|
||||
|
|
@ -369,13 +378,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT<top>.F16.F64 <Sd>, <Dm>")]
|
||||
public void Vcvt_F64_F16([Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d0,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d1,
|
||||
[Values] bool top)
|
||||
[Theory(DisplayName = "VCVT<top>.F16.F64 <Sd>, <Dm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_F64_F16([CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d1,
|
||||
bool top)
|
||||
{
|
||||
uint opcode = 0xeeb30b40; // VCVTB.F16.F64 S0, D0
|
||||
|
||||
|
|
@ -394,14 +403,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VCVT<top>.F<size>.F16 <Vd>, <Sm>")]
|
||||
public void Vcvt_F16_Fx([Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d0,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d1,
|
||||
[Values] bool top,
|
||||
[Values] bool sz)
|
||||
[Theory(DisplayName = "VCVT<top>.F<size>.F16 <Vd>, <Sm>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_F16_Fx([CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d1,
|
||||
bool top,
|
||||
bool sz)
|
||||
{
|
||||
uint opcode = 0xeeb20a40; // VCVTB.F32.F16 S0, S0
|
||||
|
||||
|
|
@ -429,16 +438,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VCVT.I32.F32 <Vd>, <Vm>, #<fbits>")]
|
||||
public void Vcvt_V_Fixed_F32_I32([Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s0,
|
||||
[ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s1,
|
||||
[ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s2,
|
||||
[ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s3,
|
||||
[Random(32u, 63u, 1)] uint fixImm,
|
||||
[Values] bool unsigned,
|
||||
[Values] bool q)
|
||||
public static readonly uint[] RandomFixImm =
|
||||
{
|
||||
Random.Shared.NextUInt(32u, 64u),
|
||||
};
|
||||
|
||||
[Theory(DisplayName = "VCVT.I32.F32 <Vd>, <Vm>, #<fbits>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_V_Fixed_F32_I32([CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))][CombinatorialRandomData(Count = RndCnt)] ulong s0,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))][CombinatorialRandomData(Count = RndCnt)] ulong s1,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))][CombinatorialRandomData(Count = RndCnt)] ulong s2,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))][CombinatorialRandomData(Count = RndCnt)] ulong s3,
|
||||
[CombinatorialMemberData(nameof(RandomFixImm))] uint fixImm,
|
||||
bool unsigned,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xF2800F10u; // VCVT.U32.F32 D0, D0, #0
|
||||
|
||||
|
|
@ -469,16 +484,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VCVT.F32.I32 <Vd>, <Vm>, #<fbits>")]
|
||||
public void Vcvt_V_Fixed_I32_F32([Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[ValueSource(nameof(_1S_))][Random(RndCnt)] uint s0,
|
||||
[ValueSource(nameof(_1S_))][Random(RndCnt)] uint s1,
|
||||
[ValueSource(nameof(_1S_))][Random(RndCnt)] uint s2,
|
||||
[ValueSource(nameof(_1S_))][Random(RndCnt)] uint s3,
|
||||
[Range(32u, 63u, 1)] uint fixImm,
|
||||
[Values] bool unsigned,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VCVT.F32.I32 <Vd>, <Vm>, #<fbits>")]
|
||||
[PairwiseData]
|
||||
public void Vcvt_V_Fixed_I32_F32([CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialMemberData(nameof(_1S_))][CombinatorialRandomData(Count = RndCnt)] uint s0,
|
||||
[CombinatorialMemberData(nameof(_1S_))][CombinatorialRandomData(Count = RndCnt)] uint s1,
|
||||
[CombinatorialMemberData(nameof(_1S_))][CombinatorialRandomData(Count = RndCnt)] uint s2,
|
||||
[CombinatorialMemberData(nameof(_1S_))][CombinatorialRandomData(Count = RndCnt)] uint s3,
|
||||
[CombinatorialRange(32u, 63u, 1)] uint fixImm,
|
||||
bool unsigned,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xF2800E10u; // VCVT.F32.U32 D0, D0, #0
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,18 @@
|
|||
// #define SimdExt
|
||||
#define SimdExt
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdExt")]
|
||||
public sealed class CpuTestSimdExt : CpuTest
|
||||
{
|
||||
public CpuTestSimdExt(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdExt
|
||||
|
||||
#region "ValueSource"
|
||||
|
|
@ -19,14 +25,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
[Test, Pairwise, Description("EXT <Vd>.8B, <Vn>.8B, <Vm>.8B, #<index>")]
|
||||
public void Ext_V_8B([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[ValueSource(nameof(_8B_))] ulong b,
|
||||
[Values(0u, 7u)] uint index)
|
||||
[SkippableTheory(DisplayName = "EXT <Vd>.8B, <Vn>.8B, <Vm>.8B, #<index>")]
|
||||
[PairwiseData]
|
||||
public void Ext_V_8B([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong b,
|
||||
[CombinatorialValues(0u, 7u)] uint index)
|
||||
{
|
||||
uint imm4 = index & 0x7u;
|
||||
|
||||
|
|
@ -43,14 +50,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("EXT <Vd>.16B, <Vn>.16B, <Vm>.16B, #<index>")]
|
||||
public void Ext_V_16B([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[ValueSource(nameof(_8B_))] ulong b,
|
||||
[Values(0u, 15u)] uint index)
|
||||
[SkippableTheory(DisplayName = "EXT <Vd>.16B, <Vn>.16B, <Vm>.16B, #<index>")]
|
||||
[PairwiseData]
|
||||
public void Ext_V_16B([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong b,
|
||||
[CombinatorialValues(0u, 15u)] uint index)
|
||||
{
|
||||
uint imm4 = index & 0xFu;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdFcond
|
||||
#define SimdFcond
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using System.Collections.Generic;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdFcond")]
|
||||
public sealed class CpuTestSimdFcond : CpuTest
|
||||
{
|
||||
public CpuTestSimdFcond(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdFcond
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -43,7 +51,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
|
|
@ -137,71 +145,77 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Ccmp_Ccmpe_S_S([ValueSource(nameof(_F_Ccmp_Ccmpe_S_S_))] uint opcodes,
|
||||
[ValueSource(nameof(_1S_F_))] ulong a,
|
||||
[ValueSource(nameof(_1S_F_))] ulong b,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
public static readonly uint[] RandomNzcv =
|
||||
{
|
||||
Random.Shared.NextUInt(15u),
|
||||
Random.Shared.NextUInt(15u),
|
||||
};
|
||||
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Ccmp_Ccmpe_S_S([CombinatorialMemberData(nameof(_F_Ccmp_Ccmpe_S_S_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong b,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
{
|
||||
opcodes |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0(b);
|
||||
|
||||
bool v = TestContext.CurrentContext.Random.NextBool();
|
||||
bool c = TestContext.CurrentContext.Random.NextBool();
|
||||
bool z = TestContext.CurrentContext.Random.NextBool();
|
||||
bool n = TestContext.CurrentContext.Random.NextBool();
|
||||
bool v = Random.Shared.NextBool();
|
||||
bool c = Random.Shared.NextBool();
|
||||
bool z = Random.Shared.NextBool();
|
||||
bool n = Random.Shared.NextBool();
|
||||
|
||||
SingleOpcode(opcodes, v1: v1, v2: v2, overflow: v, carry: c, zero: z, negative: n);
|
||||
|
||||
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Ccmp_Ccmpe_S_D([ValueSource(nameof(_F_Ccmp_Ccmpe_S_D_))] uint opcodes,
|
||||
[ValueSource(nameof(_1D_F_))] ulong a,
|
||||
[ValueSource(nameof(_1D_F_))] ulong b,
|
||||
[Random(0u, 15u, RndCntNzcv)] uint nzcv,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Ccmp_Ccmpe_S_D([CombinatorialMemberData(nameof(_F_Ccmp_Ccmpe_S_D_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong b,
|
||||
[CombinatorialMemberData(nameof(RandomNzcv))] uint nzcv,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
{
|
||||
opcodes |= ((cond & 15) << 12) | ((nzcv & 15) << 0);
|
||||
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0(b);
|
||||
|
||||
bool v = TestContext.CurrentContext.Random.NextBool();
|
||||
bool c = TestContext.CurrentContext.Random.NextBool();
|
||||
bool z = TestContext.CurrentContext.Random.NextBool();
|
||||
bool n = TestContext.CurrentContext.Random.NextBool();
|
||||
bool v = Random.Shared.NextBool();
|
||||
bool c = Random.Shared.NextBool();
|
||||
bool z = Random.Shared.NextBool();
|
||||
bool n = Random.Shared.NextBool();
|
||||
|
||||
SingleOpcode(opcodes, v1: v1, v2: v2, overflow: v, carry: c, zero: z, negative: n);
|
||||
|
||||
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Csel_S_S([ValueSource(nameof(_F_Csel_S_S_))] uint opcodes,
|
||||
[ValueSource(nameof(_1S_F_))] ulong a,
|
||||
[ValueSource(nameof(_1S_F_))] ulong b,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Csel_S_S([CombinatorialMemberData(nameof(_F_Csel_S_S_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong b,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
{
|
||||
opcodes |= ((cond & 15) << 12);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0(b);
|
||||
|
|
@ -211,19 +225,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Csel_S_D([ValueSource(nameof(_F_Csel_S_D_))] uint opcodes,
|
||||
[ValueSource(nameof(_1D_F_))] ulong a,
|
||||
[ValueSource(nameof(_1D_F_))] ulong b,
|
||||
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Csel_S_D([CombinatorialMemberData(nameof(_F_Csel_S_D_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong b,
|
||||
[CombinatorialValues(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
|
||||
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
|
||||
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
|
||||
0b1100u, 0b1101u, 0b1110u, 0b1111u)] uint cond) // GT, LE, AL, NV>
|
||||
{
|
||||
opcodes |= ((cond & 15) << 12);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0(b);
|
||||
|
|
|
|||
|
|
@ -1,12 +1,19 @@
|
|||
// #define SimdFmov
|
||||
#define SimdFmov
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdFmov")]
|
||||
public sealed class CpuTestSimdFmov : CpuTest
|
||||
{
|
||||
public CpuTestSimdFmov(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdFmov
|
||||
|
||||
#region "ValueSource"
|
||||
|
|
@ -27,14 +34,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mov_Si_S([ValueSource(nameof(_F_Mov_Si_S_))] uint opcodes,
|
||||
[Range(0u, 255u, 1u)] uint imm8)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mov_Si_S([CombinatorialMemberData(nameof(_F_Mov_Si_S_))] uint opcodes,
|
||||
[CombinatorialRange(0u, 255u, 1u)] uint imm8)
|
||||
{
|
||||
opcodes |= ((imm8 & 0xFFu) << 13);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -42,14 +49,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mov_Si_D([ValueSource(nameof(_F_Mov_Si_D_))] uint opcodes,
|
||||
[Range(0u, 255u, 1u)] uint imm8)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mov_Si_D([CombinatorialMemberData(nameof(_F_Mov_Si_D_))] uint opcodes,
|
||||
[CombinatorialRange(0u, 255u, 1u)] uint imm8)
|
||||
{
|
||||
opcodes |= ((imm8 & 0xFFu) << 13);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdImm
|
||||
#define SimdImm
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using System.Collections.Generic;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdImm")]
|
||||
public sealed class CpuTestSimdImm : CpuTest
|
||||
{
|
||||
public CpuTestSimdImm(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdImm
|
||||
|
||||
#region "Helper methods"
|
||||
|
|
@ -69,7 +77,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCntImm8; cnt++)
|
||||
{
|
||||
byte imm8 = TestContext.CurrentContext.Random.NextByte();
|
||||
byte imm8 = Random.Shared.NextByte();
|
||||
|
||||
yield return imm8;
|
||||
}
|
||||
|
|
@ -84,7 +92,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCntImm64; cnt++)
|
||||
{
|
||||
byte imm8 = TestContext.CurrentContext.Random.NextByte();
|
||||
byte imm8 = Random.Shared.NextByte();
|
||||
|
||||
yield return ExpandImm8(imm8);
|
||||
}
|
||||
|
|
@ -189,12 +197,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
private const int RndCntImm8 = 2;
|
||||
private const int RndCntImm64 = 2;
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Bic_Orr_Vi_16bit([ValueSource(nameof(_Bic_Orr_Vi_16bit_))] uint opcodes,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[Values(0b0u, 0b1u)] uint amount, // <0, 8>
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Bic_Orr_Vi_16bit([CombinatorialMemberData(nameof(_Bic_Orr_Vi_16bit_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint amount, // <0, 8>
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
uint abc = (imm8 & 0xE0u) >> 5;
|
||||
uint defgh = (imm8 & 0x1Fu);
|
||||
|
|
@ -210,12 +219,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Bic_Orr_Vi_32bit([ValueSource(nameof(_Bic_Orr_Vi_32bit_))] uint opcodes,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint amount, // <0, 8, 16, 24>
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Bic_Orr_Vi_32bit([CombinatorialMemberData(nameof(_Bic_Orr_Vi_32bit_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[CombinatorialValues(0b00u, 0b01u, 0b10u, 0b11u)] uint amount, // <0, 8, 16, 24>
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint abc = (imm8 & 0xE0u) >> 5;
|
||||
uint defgh = (imm8 & 0x1Fu);
|
||||
|
|
@ -231,17 +241,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mov_Vi_2S([ValueSource(nameof(_F_Mov_Vi_2S_))] uint opcodes,
|
||||
[Range(0u, 255u, 1u)] uint abcdefgh)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mov_Vi_2S([CombinatorialMemberData(nameof(_F_Mov_Vi_2S_))] uint opcodes,
|
||||
[CombinatorialRange(0u, 255u, 1u)] uint abcdefgh)
|
||||
{
|
||||
uint abc = (abcdefgh & 0xE0u) >> 5;
|
||||
uint defgh = (abcdefgh & 0x1Fu);
|
||||
|
||||
opcodes |= (abc << 16) | (defgh << 5);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -249,10 +259,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mov_Vi_4S([ValueSource(nameof(_F_Mov_Vi_4S_))] uint opcodes,
|
||||
[Range(0u, 255u, 1u)] uint abcdefgh)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mov_Vi_4S([CombinatorialMemberData(nameof(_F_Mov_Vi_4S_))] uint opcodes,
|
||||
[CombinatorialRange(0u, 255u, 1u)] uint abcdefgh)
|
||||
{
|
||||
uint abc = (abcdefgh & 0xE0u) >> 5;
|
||||
uint defgh = (abcdefgh & 0x1Fu);
|
||||
|
|
@ -264,10 +274,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mov_Vi_2D([ValueSource(nameof(_F_Mov_Vi_2D_))] uint opcodes,
|
||||
[Range(0u, 255u, 1u)] uint abcdefgh)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mov_Vi_2D([CombinatorialMemberData(nameof(_F_Mov_Vi_2D_))] uint opcodes,
|
||||
[CombinatorialRange(0u, 255u, 1u)] uint abcdefgh)
|
||||
{
|
||||
uint abc = (abcdefgh & 0xE0u) >> 5;
|
||||
uint defgh = (abcdefgh & 0x1Fu);
|
||||
|
|
@ -279,10 +289,11 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Movi_V_8bit([ValueSource(nameof(_Movi_V_8bit_))] uint opcodes,
|
||||
[ValueSource(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Movi_V_8bit([CombinatorialMemberData(nameof(_Movi_V_8bit_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
uint abc = (imm8 & 0xE0u) >> 5;
|
||||
uint defgh = (imm8 & 0x1Fu);
|
||||
|
|
@ -290,7 +301,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcodes |= (abc << 16) | (defgh << 5);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(q == 0u ? z : 0ul);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -298,11 +309,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Movi_Mvni_V_16bit_shifted_imm([ValueSource(nameof(_Movi_Mvni_V_16bit_shifted_imm_))] uint opcodes,
|
||||
[ValueSource(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[Values(0b0u, 0b1u)] uint amount, // <0, 8>
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Movi_Mvni_V_16bit_shifted_imm([CombinatorialMemberData(nameof(_Movi_Mvni_V_16bit_shifted_imm_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint amount, // <0, 8>
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
uint abc = (imm8 & 0xE0u) >> 5;
|
||||
uint defgh = (imm8 & 0x1Fu);
|
||||
|
|
@ -311,7 +323,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcodes |= ((amount & 1) << 13);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(q == 0u ? z : 0ul);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -319,11 +331,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Movi_Mvni_V_32bit_shifted_imm([ValueSource(nameof(_Movi_Mvni_V_32bit_shifted_imm_))] uint opcodes,
|
||||
[ValueSource(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[Values(0b00u, 0b01u, 0b10u, 0b11u)] uint amount, // <0, 8, 16, 24>
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Movi_Mvni_V_32bit_shifted_imm([CombinatorialMemberData(nameof(_Movi_Mvni_V_32bit_shifted_imm_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[CombinatorialValues(0b00u, 0b01u, 0b10u, 0b11u)] uint amount, // <0, 8, 16, 24>
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint abc = (imm8 & 0xE0u) >> 5;
|
||||
uint defgh = (imm8 & 0x1Fu);
|
||||
|
|
@ -332,7 +345,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcodes |= ((amount & 3) << 13);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(q == 0u ? z : 0ul);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -340,11 +353,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Movi_Mvni_V_32bit_shifting_ones([ValueSource(nameof(_Movi_Mvni_V_32bit_shifting_ones_))] uint opcodes,
|
||||
[ValueSource(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[Values(0b0u, 0b1u)] uint amount, // <8, 16>
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Movi_Mvni_V_32bit_shifting_ones([CombinatorialMemberData(nameof(_Movi_Mvni_V_32bit_shifting_ones_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_8BIT_IMM_))] byte imm8,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint amount, // <8, 16>
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint abc = (imm8 & 0xE0u) >> 5;
|
||||
uint defgh = (imm8 & 0x1Fu);
|
||||
|
|
@ -353,7 +367,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcodes |= ((amount & 1) << 12);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(q == 0u ? z : 0ul);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -361,9 +375,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Movi_V_64bit_scalar([ValueSource(nameof(_Movi_V_64bit_scalar_))] uint opcodes,
|
||||
[ValueSource(nameof(_64BIT_IMM_))] ulong imm)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Movi_V_64bit_scalar([CombinatorialMemberData(nameof(_Movi_V_64bit_scalar_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_64BIT_IMM_))] ulong imm)
|
||||
{
|
||||
byte imm8 = ShrinkImm64(imm);
|
||||
|
||||
|
|
@ -372,7 +387,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
opcodes |= (abc << 16) | (defgh << 5);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0);
|
||||
|
|
@ -380,9 +395,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Movi_V_64bit_vector([ValueSource(nameof(_Movi_V_64bit_vector_))] uint opcodes,
|
||||
[ValueSource(nameof(_64BIT_IMM_))] ulong imm)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Movi_V_64bit_vector([CombinatorialMemberData(nameof(_Movi_V_64bit_vector_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_64BIT_IMM_))] ulong imm)
|
||||
{
|
||||
byte imm8 = ShrinkImm64(imm);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,19 @@
|
|||
// #define SimdIns
|
||||
#define SimdIns
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdIns")]
|
||||
public sealed class CpuTestSimdIns : CpuTest
|
||||
{
|
||||
public CpuTestSimdIns(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdIns
|
||||
|
||||
#region "ValueSource"
|
||||
|
|
@ -81,12 +88,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
[Test, Pairwise, Description("DUP <Vd>.<T>, W<n>")]
|
||||
public void Dup_Gp_W([Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(0, 1, 2)] int size, // Q0: <8B, 4H, 2S>
|
||||
[Values(0b0u, 0b1u)] uint q) // Q1: <16B, 8H, 4S>
|
||||
[SkippableTheory(DisplayName = "DUP <Vd>.<T>, W<n>")]
|
||||
[PairwiseData]
|
||||
public void Dup_Gp_W([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn,
|
||||
[CombinatorialValues(0, 1, 2)] int size, // Q0: <8B, 4H, 2S>
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // Q1: <16B, 8H, 4S>
|
||||
{
|
||||
uint imm5 = (1u << size) & 0x1Fu;
|
||||
|
||||
|
|
@ -95,8 +103,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (imm5 << 16);
|
||||
opcode |= ((q & 1) << 30);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -104,16 +112,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP <Vd>.<T>, X<n>")]
|
||||
public void Dup_Gp_X([Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn)
|
||||
[SkippableTheory(DisplayName = "DUP <Vd>.<T>, X<n>")]
|
||||
[PairwiseData]
|
||||
public void Dup_Gp_X([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_X_))] ulong xn)
|
||||
{
|
||||
uint opcode = 0x4E080C00; // DUP V0.2D, X0
|
||||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x31: x31, v0: v0);
|
||||
|
|
@ -121,9 +130,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP B0, V1.B[<index>]")]
|
||||
public void Dup_S_B([ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 15u)] uint index)
|
||||
[SkippableTheory(DisplayName = "DUP B0, V1.B[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_S_B([CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint index)
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -132,7 +142,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
uint opcode = 0x5E000420; // RESERVED
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
|
|
@ -141,9 +151,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP H0, V1.H[<index>]")]
|
||||
public void Dup_S_H([ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 7u)] uint index)
|
||||
[SkippableTheory(DisplayName = "DUP H0, V1.H[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_S_H([CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint index)
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -152,7 +163,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
uint opcode = 0x5E000420; // RESERVED
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
|
|
@ -161,9 +172,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP S0, V1.S[<index>]")]
|
||||
public void Dup_S_S([ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index)
|
||||
[SkippableTheory(DisplayName = "DUP S0, V1.S[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_S_S([CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index)
|
||||
{
|
||||
const int TestSize = 2;
|
||||
|
||||
|
|
@ -172,7 +184,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
uint opcode = 0x5E000420; // RESERVED
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
|
|
@ -181,9 +193,10 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP D0, V1.D[<index>]")]
|
||||
public void Dup_S_D([ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory(DisplayName = "DUP D0, V1.D[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_S_D([CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
const int TestSize = 3;
|
||||
|
||||
|
|
@ -192,7 +205,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
uint opcode = 0x5E000420; // RESERVED
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
|
|
@ -201,13 +214,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP <Vd>.<T>, <Vn>.B[<index>]")]
|
||||
public void Dup_V_8B_16B([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 15u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
[SkippableTheory(DisplayName = "DUP <Vd>.<T>, <Vn>.B[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_V_8B_16B([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -226,13 +240,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP <Vd>.<T>, <Vn>.H[<index>]")]
|
||||
public void Dup_V_4H_8H([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 7u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory(DisplayName = "DUP <Vd>.<T>, <Vn>.H[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_V_4H_8H([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -251,13 +266,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP <Vd>.<T>, <Vn>.S[<index>]")]
|
||||
public void Dup_V_2S_4S([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory(DisplayName = "DUP <Vd>.<T>, <Vn>.S[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_V_2S_4S([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
const int TestSize = 2;
|
||||
|
||||
|
|
@ -276,13 +292,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("DUP <Vd>.<T>, <Vn>.D[<index>]")]
|
||||
public void Dup_V_2D([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(0u, 1u)] uint index,
|
||||
[Values(0b1u)] uint q) // <2D>
|
||||
[SkippableTheory(DisplayName = "DUP <Vd>.<T>, <Vn>.D[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Dup_V_2D([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u)] uint index,
|
||||
[CombinatorialValues(0b1u)] uint q) // <2D>
|
||||
{
|
||||
const int TestSize = 3;
|
||||
|
||||
|
|
@ -301,12 +318,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.B[<index>], W<n>")]
|
||||
public void Ins_Gp_WB([Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(0u, 15u)] uint index)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.B[<index>], W<n>")]
|
||||
[PairwiseData]
|
||||
public void Ins_Gp_WB([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn,
|
||||
[CombinatorialValues(0u, 15u)] uint index)
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -316,7 +334,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -324,12 +342,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.H[<index>], W<n>")]
|
||||
public void Ins_Gp_WH([Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(0u, 7u)] uint index)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.H[<index>], W<n>")]
|
||||
[PairwiseData]
|
||||
public void Ins_Gp_WH([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn,
|
||||
[CombinatorialValues(0u, 7u)] uint index)
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -339,7 +358,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -347,12 +366,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.S[<index>], W<n>")]
|
||||
public void Ins_Gp_WS([Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.S[<index>], W<n>")]
|
||||
[PairwiseData]
|
||||
public void Ins_Gp_WS([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_W_))] uint wn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index)
|
||||
{
|
||||
const int TestSize = 2;
|
||||
|
||||
|
|
@ -362,7 +382,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcode, x1: wn, x31: w31, v0: v0);
|
||||
|
|
@ -370,12 +390,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.D[<index>], X<n>")]
|
||||
public void Ins_Gp_XD([Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_X_))] ulong xn,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.D[<index>], X<n>")]
|
||||
[PairwiseData]
|
||||
public void Ins_Gp_XD([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 31u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_X_))] ulong xn,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
const int TestSize = 3;
|
||||
|
||||
|
|
@ -385,7 +406,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcode, x1: xn, x31: x31, v0: v0);
|
||||
|
|
@ -393,13 +414,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.B[<index1>], <Vn>.B[<index2>]")]
|
||||
public void Ins_V_BB([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 15u)] uint dstIndex,
|
||||
[Values(0u, 15u)] uint srcIndex)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.B[<index1>], <Vn>.B[<index2>]")]
|
||||
[PairwiseData]
|
||||
public void Ins_V_BB([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint dstIndex,
|
||||
[CombinatorialValues(0u, 15u)] uint srcIndex)
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -419,13 +441,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.H[<index1>], <Vn>.H[<index2>]")]
|
||||
public void Ins_V_HH([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 7u)] uint dstIndex,
|
||||
[Values(0u, 7u)] uint srcIndex)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.H[<index1>], <Vn>.H[<index2>]")]
|
||||
[PairwiseData]
|
||||
public void Ins_V_HH([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint dstIndex,
|
||||
[CombinatorialValues(0u, 7u)] uint srcIndex)
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -445,13 +468,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.S[<index1>], <Vn>.S[<index2>]")]
|
||||
public void Ins_V_SS([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 1u, 2u, 3u)] uint dstIndex,
|
||||
[Values(0u, 1u, 2u, 3u)] uint srcIndex)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.S[<index1>], <Vn>.S[<index2>]")]
|
||||
[PairwiseData]
|
||||
public void Ins_V_SS([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint dstIndex,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint srcIndex)
|
||||
{
|
||||
const int TestSize = 2;
|
||||
|
||||
|
|
@ -471,13 +495,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("INS <Vd>.D[<index1>], <Vn>.D[<index2>]")]
|
||||
public void Ins_V_DD([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(0u, 1u)] uint dstIndex,
|
||||
[Values(0u, 1u)] uint srcIndex)
|
||||
[SkippableTheory(DisplayName = "INS <Vd>.D[<index1>], <Vn>.D[<index2>]")]
|
||||
[PairwiseData]
|
||||
public void Ins_V_DD([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u)] uint dstIndex,
|
||||
[CombinatorialValues(0u, 1u)] uint srcIndex)
|
||||
{
|
||||
const int TestSize = 3;
|
||||
|
||||
|
|
@ -497,11 +522,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMOV <Wd>, <Vn>.B[<index>]")]
|
||||
public void Smov_S_BW([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 15u)] uint index)
|
||||
[SkippableTheory(DisplayName = "SMOV <Wd>, <Vn>.B[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Smov_S_BW([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint index)
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -511,8 +537,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -520,11 +546,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMOV <Wd>, <Vn>.H[<index>]")]
|
||||
public void Smov_S_HW([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 7u)] uint index)
|
||||
[SkippableTheory(DisplayName = "SMOV <Wd>, <Vn>.H[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Smov_S_HW([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint index)
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -534,8 +561,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -543,11 +570,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMOV <Xd>, <Vn>.B[<index>]")]
|
||||
public void Smov_S_BX([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 15u)] uint index)
|
||||
[SkippableTheory(DisplayName = "SMOV <Xd>, <Vn>.B[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Smov_S_BX([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint index)
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -557,7 +585,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x31: x31, v1: v1);
|
||||
|
|
@ -565,11 +593,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMOV <Xd>, <Vn>.H[<index>]")]
|
||||
public void Smov_S_HX([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 7u)] uint index)
|
||||
[SkippableTheory(DisplayName = "SMOV <Xd>, <Vn>.H[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Smov_S_HX([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint index)
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -579,7 +608,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x31: x31, v1: v1);
|
||||
|
|
@ -587,11 +616,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SMOV <Xd>, <Vn>.S[<index>]")]
|
||||
public void Smov_S_SX([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index)
|
||||
[SkippableTheory(DisplayName = "SMOV <Xd>, <Vn>.S[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Smov_S_SX([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index)
|
||||
{
|
||||
const int TestSize = 2;
|
||||
|
||||
|
|
@ -601,7 +631,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x31: x31, v1: v1);
|
||||
|
|
@ -609,11 +639,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMOV <Wd>, <Vn>.B[<index>]")]
|
||||
public void Umov_S_BW([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 15u)] uint index)
|
||||
[SkippableTheory(DisplayName = "UMOV <Wd>, <Vn>.B[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Umov_S_BW([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint index)
|
||||
{
|
||||
const int TestSize = 0;
|
||||
|
||||
|
|
@ -623,8 +654,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -632,11 +663,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMOV <Wd>, <Vn>.H[<index>]")]
|
||||
public void Umov_S_HW([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 7u)] uint index)
|
||||
[SkippableTheory(DisplayName = "UMOV <Wd>, <Vn>.H[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Umov_S_HW([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint index)
|
||||
{
|
||||
const int TestSize = 1;
|
||||
|
||||
|
|
@ -646,8 +678,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -655,11 +687,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMOV <Wd>, <Vn>.S[<index>]")]
|
||||
public void Umov_S_SW([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index)
|
||||
[SkippableTheory(DisplayName = "UMOV <Wd>, <Vn>.S[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Umov_S_SW([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index)
|
||||
{
|
||||
const int TestSize = 2;
|
||||
|
||||
|
|
@ -669,8 +702,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong x0 = (ulong)Random.Shared.NextUInt() << 32;
|
||||
uint w31 = Random.Shared.NextUInt();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
|
||||
|
|
@ -678,11 +711,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("UMOV <Xd>, <Vn>.D[<index>]")]
|
||||
public void Umov_S_DX([Values(0u, 31u)] uint rd,
|
||||
[Values(1u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory(DisplayName = "UMOV <Xd>, <Vn>.D[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Umov_S_DX([CombinatorialValues(0u, 31u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
const int TestSize = 3;
|
||||
|
||||
|
|
@ -692,7 +726,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcode |= (imm5 << 16);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong x31 = Random.Shared.NextULong();
|
||||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcode, x31: x31, v1: v1);
|
||||
|
|
|
|||
|
|
@ -1,12 +1,18 @@
|
|||
// #define SimdLogical32
|
||||
#define SimdLogical32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdLogical32")]
|
||||
public sealed class CpuTestSimdLogical32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdLogical32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdLogical32
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -49,15 +55,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I([ValueSource(nameof(_Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I_))] uint opcode,
|
||||
[Range(0u, 5u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[Values(ulong.MinValue, ulong.MaxValue)] ulong z,
|
||||
[Values(ulong.MinValue, ulong.MaxValue)] ulong a,
|
||||
[Values(ulong.MinValue, ulong.MaxValue)] ulong b,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I([CombinatorialMemberData(nameof(_Vbic_Vbif_Vbit_Vbsl_Vand_Vorn_Vorr_Veor_I_))] uint opcode,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialValues(ulong.MinValue, ulong.MaxValue)] ulong z,
|
||||
[CombinatorialValues(ulong.MinValue, ulong.MaxValue)] ulong a,
|
||||
[CombinatorialValues(ulong.MinValue, ulong.MaxValue)] ulong b,
|
||||
bool q)
|
||||
{
|
||||
if (q)
|
||||
{
|
||||
|
|
@ -84,13 +91,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vbic_Vorr_II([ValueSource(nameof(_Vbic_Vorr_II_))] uint opcode,
|
||||
[Values(0u, 1u)] uint rd,
|
||||
[Values(ulong.MinValue, ulong.MaxValue)] ulong z,
|
||||
[Values(byte.MinValue, byte.MaxValue)] byte imm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint cMode,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vbic_Vorr_II([CombinatorialMemberData(nameof(_Vbic_Vorr_II_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(ulong.MinValue, ulong.MaxValue)] ulong z,
|
||||
[CombinatorialValues(byte.MinValue, byte.MaxValue)] byte imm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint cMode,
|
||||
bool q)
|
||||
{
|
||||
if ((opcode & 0x800) != 0) // cmode<3> == '1' (A2)
|
||||
{
|
||||
|
|
@ -118,15 +126,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VTST.<dt> <Vd>, <Vn>, <Vm>")]
|
||||
public void Vtst([Range(0u, 5u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong z,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong a,
|
||||
[ValueSource(nameof(_8B4H2S_))] ulong b,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VTST.<dt> <Vd>, <Vn>, <Vm>")]
|
||||
[PairwiseData]
|
||||
public void Vtst([CombinatorialRange(0u, 5u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf2000810u; // VTST.8 D0, D0, D0
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdMemory32
|
||||
#define SimdMemory32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using Ryujinx.Memory;
|
||||
using System;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdMemory32")]
|
||||
public sealed class CpuTestSimdMemory32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdMemory32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
private static readonly uint _testOffset = DataBaseAddress + 0x500;
|
||||
#if SimdMemory32
|
||||
|
||||
|
|
@ -32,14 +40,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
0b0001,
|
||||
};
|
||||
|
||||
[Test, Pairwise, Description("VLDn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (single n element structure)")]
|
||||
public void Vldn_Single([Values(0u, 1u, 2u)] uint size,
|
||||
[Values(0u, 13u)] uint rn,
|
||||
[Values(1u, 13u, 15u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[Range(0u, 7u)] uint index,
|
||||
[Range(0u, 3u)] uint n,
|
||||
[Values(0x0u)] uint offset)
|
||||
[Theory(DisplayName = "VLDn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (single n element structure)")]
|
||||
[PairwiseData]
|
||||
public void Vldn_Single([CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialValues(0u, 13u)] uint rn,
|
||||
[CombinatorialValues(1u, 13u, 15u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[CombinatorialRange(0u, 7u, 1)] uint index,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint n,
|
||||
[CombinatorialValues(0x0u)] uint offset)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -62,14 +71,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VLDn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (all lanes)")]
|
||||
public void Vldn_All([Values(0u, 13u)] uint rn,
|
||||
[Values(1u, 13u, 15u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[Range(0u, 3u)] uint n,
|
||||
[Range(0u, 2u)] uint size,
|
||||
[Values] bool t,
|
||||
[Values(0x0u)] uint offset)
|
||||
[Theory(DisplayName = "VLDn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (all lanes)")]
|
||||
[PairwiseData]
|
||||
public void Vldn_All([CombinatorialValues(0u, 13u)] uint rn,
|
||||
[CombinatorialValues(1u, 13u, 15u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint n,
|
||||
[CombinatorialRange(0u, 2u, 1)] uint size,
|
||||
bool t,
|
||||
[CombinatorialValues(0x0u)] uint offset)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -92,13 +102,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VLDn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (multiple n element structures)")]
|
||||
public void Vldn_Pair([Values(0u, 1u, 2u, 3u)] uint size,
|
||||
[Values(0u, 13u)] uint rn,
|
||||
[Values(1u, 13u, 15u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[Range(0u, 10u)] uint mode,
|
||||
[Values(0x0u)] uint offset)
|
||||
[Theory(DisplayName = "VLDn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (multiple n element structures)")]
|
||||
[PairwiseData]
|
||||
public void Vldn_Pair([CombinatorialValues(0u, 1u, 2u, 3u)] uint size,
|
||||
[CombinatorialValues(0u, 13u)] uint rn,
|
||||
[CombinatorialValues(1u, 13u, 15u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[CombinatorialRange(0u, 10u, 1)] uint mode,
|
||||
[CombinatorialValues(0x0u)] uint offset)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -121,14 +132,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VSTn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (single n element structure)")]
|
||||
public void Vstn_Single([Values(0u, 1u, 2u)] uint size,
|
||||
[Values(0u, 13u)] uint rn,
|
||||
[Values(1u, 13u, 15u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[Range(0u, 7u)] uint index,
|
||||
[Range(0u, 3u)] uint n,
|
||||
[Values(0x0u)] uint offset)
|
||||
[Theory(DisplayName = "VSTn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (single n element structure)")]
|
||||
[PairwiseData]
|
||||
public void Vstn_Single([CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialValues(0u, 13u)] uint rn,
|
||||
[CombinatorialValues(1u, 13u, 15u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[CombinatorialRange(0u, 7u, 1)] uint index,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint n,
|
||||
[CombinatorialValues(0x0u)] uint offset)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -153,13 +165,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VSTn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (multiple n element structures)")]
|
||||
public void Vstn_Pair([Values(0u, 1u, 2u, 3u)] uint size,
|
||||
[Values(0u, 13u)] uint rn,
|
||||
[Values(1u, 13u, 15u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[Range(0u, 10u)] uint mode,
|
||||
[Values(0x0u)] uint offset)
|
||||
[Theory(DisplayName = "VSTn.<size> <list>, [<Rn> {:<align>}]{ /!/, <Rm>} (multiple n element structures)")]
|
||||
[PairwiseData]
|
||||
public void Vstn_Pair([CombinatorialValues(0u, 1u, 2u, 3u)] uint size,
|
||||
[CombinatorialValues(0u, 13u)] uint rn,
|
||||
[CombinatorialValues(1u, 13u, 15u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[CombinatorialRange(0u, 10u, 1)] uint mode,
|
||||
[CombinatorialValues(0x0u)] uint offset)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -184,12 +197,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VLDM.<size> <Rn>{!}, <d/sreglist>")]
|
||||
public void Vldm([Values(0u, 13u)] uint rn,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[Range(0u, 2u)] uint mode,
|
||||
[Values(0x1u, 0x32u)] uint regs,
|
||||
[Values] bool single)
|
||||
[Theory(DisplayName = "VLDM.<size> <Rn>{!}, <d/sreglist>")]
|
||||
[PairwiseData]
|
||||
public void Vldm([CombinatorialValues(0u, 13u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint vd,
|
||||
[CombinatorialRange(0u, 2u, 1)] uint mode,
|
||||
[CombinatorialValues(0x1u, 0x32u)] uint regs,
|
||||
bool single)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -236,12 +250,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VLDR.<size> <Sd>, [<Rn> {, #{+/-}<imm>}]")]
|
||||
public void Vldr([Values(2u, 3u)] uint size, // FP16 is not supported for now
|
||||
[Values(0u)] uint rn,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint sd,
|
||||
[Values(0x0u)] uint imm,
|
||||
[Values] bool sub)
|
||||
[Theory(DisplayName = "VLDR.<size> <Sd>, [<Rn> {, #{+/-}<imm>}]")]
|
||||
[PairwiseData]
|
||||
public void Vldr([CombinatorialValues(2u, 3u)] uint size, // FP16 is not supported for now
|
||||
[CombinatorialValues(0u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint sd,
|
||||
[CombinatorialValues(0x0u)] uint imm,
|
||||
bool sub)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
@ -271,12 +286,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VSTR.<size> <Sd>, [<Rn> {, #{+/-}<imm>}]")]
|
||||
public void Vstr([Values(2u, 3u)] uint size, // FP16 is not supported for now
|
||||
[Values(0u)] uint rn,
|
||||
[Values(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint sd,
|
||||
[Values(0x0u)] uint imm,
|
||||
[Values] bool sub)
|
||||
[Theory(DisplayName = "VSTR.<size> <Sd>, [<Rn> {, #{+/-}<imm>}]")]
|
||||
[PairwiseData]
|
||||
public void Vstr([CombinatorialValues(2u, 3u)] uint size, // FP16 is not supported for now
|
||||
[CombinatorialValues(0u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u)] uint sd,
|
||||
[CombinatorialValues(0x0u)] uint imm,
|
||||
bool sub)
|
||||
{
|
||||
var data = GenerateVectorSequence((int)MemoryBlock.GetPageSize());
|
||||
SetWorkingMemory(0, data);
|
||||
|
|
|
|||
|
|
@ -1,20 +1,28 @@
|
|||
// #define SimdMov32
|
||||
#define SimdMov32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdMov32")]
|
||||
public sealed class CpuTestSimdMov32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdMov32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdMov32
|
||||
private const int RndCntImm = 2;
|
||||
|
||||
[Test, Pairwise, Description("VMOV.I<size> <Dd/Qd>, #<imm>")]
|
||||
public void Movi_V([Range(0u, 10u)] uint variant,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0x0u)] uint imm,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VMOV.I<size> <Dd/Qd>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Movi_V([CombinatorialRange(0u, 10u, 1)] uint variant,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0x0u)] uint imm,
|
||||
bool q)
|
||||
{
|
||||
uint[] variants =
|
||||
{
|
||||
|
|
@ -58,10 +66,11 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMOV.F<size> <Sd>, #<imm>")]
|
||||
public void Movi_S([Range(2u, 3u)] uint size,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0x0u)] uint imm)
|
||||
[Theory(DisplayName = "VMOV.F<size> <Sd>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Movi_S([CombinatorialRange(2u, 3u, 1)] uint size,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0x0u)] uint imm)
|
||||
{
|
||||
uint opcode = 0xeeb00800u;
|
||||
opcode |= (size & 3) << 8;
|
||||
|
|
@ -83,13 +92,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMOV <Rd>, <Sd>")]
|
||||
public void Mov_GP([Values(0u, 1u, 2u, 3u)] uint vn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt,
|
||||
[Random(RndCntImm)] uint valueRn,
|
||||
[Random(RndCntImm)] ulong valueVn1,
|
||||
[Random(RndCntImm)] ulong valueVn2,
|
||||
[Values] bool op)
|
||||
[Theory(DisplayName = "VMOV <Rd>, <Sd>")]
|
||||
[PairwiseData]
|
||||
public void Mov_GP([CombinatorialValues(0u, 1u, 2u, 3u)] uint vn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] uint valueRn,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn2,
|
||||
bool op)
|
||||
{
|
||||
uint opcode = 0xee000a10u; // VMOV S0, R0
|
||||
opcode |= (vn & 1) << 7;
|
||||
|
|
@ -106,16 +116,30 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMOV.<size> <Rt>, <Dn[x]>")]
|
||||
public void Mov_GP_Elem([Range(0u, 7u)] uint vn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt,
|
||||
[Range(0u, 2u)] uint size,
|
||||
[Range(0u, 7u)] uint index,
|
||||
[Random(1)] uint valueRn,
|
||||
[Random(1)] ulong valueVn1,
|
||||
[Random(1)] ulong valueVn2,
|
||||
[Values] bool op,
|
||||
[Values] bool u)
|
||||
public static readonly uint[] RandomRn =
|
||||
{
|
||||
Random.Shared.NextUInt(),
|
||||
};
|
||||
public static readonly ulong[] RandomVn1 =
|
||||
{
|
||||
Random.Shared.NextULong(),
|
||||
};
|
||||
public static readonly ulong[] RandomVn2 =
|
||||
{
|
||||
Random.Shared.NextULong(),
|
||||
};
|
||||
|
||||
[Theory(DisplayName = "VMOV.<size> <Rt>, <Dn[x]>")]
|
||||
[PairwiseData]
|
||||
public void Mov_GP_Elem([CombinatorialRange(0u, 7u, 1)] uint vn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt,
|
||||
[CombinatorialRange(0u, 2u, 1)] uint size,
|
||||
[CombinatorialRange(0u, 7u, 1)] uint index,
|
||||
[CombinatorialMemberData(nameof(RandomRn))] uint valueRn,
|
||||
[CombinatorialMemberData(nameof(RandomVn1))] ulong valueVn1,
|
||||
[CombinatorialMemberData(nameof(RandomVn2))] ulong valueVn2,
|
||||
bool op,
|
||||
bool u)
|
||||
{
|
||||
uint opcode = 0xee000b10u; // VMOV.32 D0[0], R0
|
||||
|
||||
|
|
@ -153,15 +177,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("(VMOV <Rt>, <Rt2>, <Dm>), (VMOV <Dm>, <Rt>, <Rt2>)")]
|
||||
public void Mov_GP_D([Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt2,
|
||||
[Random(RndCntImm)] uint valueRt1,
|
||||
[Random(RndCntImm)] uint valueRt2,
|
||||
[Random(RndCntImm)] ulong valueVn1,
|
||||
[Random(RndCntImm)] ulong valueVn2,
|
||||
[Values] bool op)
|
||||
[Theory(DisplayName = "(VMOV <Rt>, <Rt2>, <Dm>), (VMOV <Dm>, <Rt>, <Rt2>)")]
|
||||
[PairwiseData]
|
||||
public void Mov_GP_D([CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt2,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] uint valueRt1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] uint valueRt2,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn2,
|
||||
bool op)
|
||||
{
|
||||
uint opcode = 0xec400b10u; // VMOV D0, R0, R0
|
||||
opcode |= (vm & 0x10) << 1;
|
||||
|
|
@ -179,15 +204,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("(VMOV <Rt>, <Rt2>, <Sm>, <Sm1>), (VMOV <Sm>, <Sm1>, <Rt>, <Rt2>)")]
|
||||
public void Mov_GP_2([Range(0u, 7u)] uint vm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt2,
|
||||
[Random(RndCntImm)] uint valueRt1,
|
||||
[Random(RndCntImm)] uint valueRt2,
|
||||
[Random(RndCntImm)] ulong valueVn1,
|
||||
[Random(RndCntImm)] ulong valueVn2,
|
||||
[Values] bool op)
|
||||
[Theory(DisplayName = "(VMOV <Rt>, <Rt2>, <Sm>, <Sm1>), (VMOV <Sm>, <Sm1>, <Rt>, <Rt2>)")]
|
||||
[PairwiseData]
|
||||
public void Mov_GP_2([CombinatorialRange(0u, 7u, 1)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt2,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] uint valueRt1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] uint valueRt2,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn2,
|
||||
bool op)
|
||||
{
|
||||
uint opcode = 0xec400a10u; // VMOV S0, S1, R0, R0
|
||||
opcode |= (vm & 1) << 5;
|
||||
|
|
@ -205,10 +231,11 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMOVN.<size> <Dt>, <Qm>")]
|
||||
public void Movn_V([Range(0u, 1u, 2u)] uint size,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 2u, 4u, 8u)] uint vm)
|
||||
[Theory(DisplayName = "VMOVN.<size> <Dt>, <Qm>")]
|
||||
[PairwiseData]
|
||||
public void Movn_V([CombinatorialRange(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 2u, 4u, 8u)] uint vm)
|
||||
{
|
||||
uint opcode = 0xf3b20200u; // VMOVN.I16 D0, Q0
|
||||
|
||||
|
|
@ -219,21 +246,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= ((vd & 0x10) << 18);
|
||||
opcode |= ((vd & 0xf) << 12);
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMOVL.<size> <Qd>, <Dm>")]
|
||||
public void Vmovl([Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 2u, 4u, 6u)] uint vd,
|
||||
[Values(1u, 2u, 4u)] uint imm3H,
|
||||
[Values] bool u)
|
||||
[Theory(DisplayName = "VMOVL.<size> <Qd>, <Dm>")]
|
||||
[PairwiseData]
|
||||
public void Vmovl([CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 2u, 4u, 6u)] uint vd,
|
||||
[CombinatorialValues(1u, 2u, 4u)] uint imm3H,
|
||||
bool u)
|
||||
{
|
||||
// This is not VMOVL because imm3H = 0, but once
|
||||
// we shift in the imm3H value it turns into VMOVL.
|
||||
|
|
@ -249,21 +277,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= 1 << 24;
|
||||
}
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMVN.<size> <Vt>, <Vm>")]
|
||||
public void Vmvn([Range(0u, 1u, 2u)] uint size,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 2u, 4u, 8u)] uint vm,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VMVN.<size> <Vt>, <Vm>")]
|
||||
[PairwiseData]
|
||||
public void Vmvn([CombinatorialRange(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 2u, 4u, 8u)] uint vm,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf3b00580u; // VMVN D0, D0
|
||||
|
||||
|
|
@ -281,21 +310,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (vd & 0x10) << 18;
|
||||
opcode |= (vd & 0xf) << 12;
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMVN.I<size> <Dd/Qd>, #<imm>")]
|
||||
public void Mvni_V([Range(0u, 7u)] uint variant,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0x0u)] uint imm,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VMVN.I<size> <Dd/Qd>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Mvni_V([CombinatorialRange(0u, 7u, 1)] uint variant,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0x0u)] uint imm,
|
||||
bool q)
|
||||
{
|
||||
uint[] variants =
|
||||
{
|
||||
|
|
@ -335,11 +365,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VTRN.<size> <Vd>, <Vm>")]
|
||||
public void Vtrn([Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VTRN.<size> <Vd>, <Vm>")]
|
||||
[PairwiseData]
|
||||
public void Vtrn([CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf3b20080u; // VTRN.8 D0, D0
|
||||
if (vm == vd)
|
||||
|
|
@ -360,21 +391,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (vd & 0xf) << 12;
|
||||
opcode |= (size & 0x3) << 18;
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VZIP.<size> <Vd>, <Vm>")]
|
||||
public void Vzip([Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VZIP.<size> <Vd>, <Vm>")]
|
||||
[PairwiseData]
|
||||
public void Vzip([CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf3b20180u; // VZIP.8 D0, D0
|
||||
if (vm == vd || (size == 2 && !q))
|
||||
|
|
@ -395,21 +427,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (vd & 0xf) << 12;
|
||||
opcode |= (size & 0x3) << 18;
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VUZP.<size> <Vd>, <Vm>")]
|
||||
public void Vuzp([Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VUZP.<size> <Vd>, <Vm>")]
|
||||
[PairwiseData]
|
||||
public void Vuzp([CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf3b20100u; // VUZP.8 d0, d0
|
||||
if (vm == vd || (size == 2 && !q))
|
||||
|
|
@ -430,22 +463,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (vd & 0xf) << 12;
|
||||
opcode |= (size & 0x3) << 18;
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VTBL.8 <Dd>, {list}, <Dm>")]
|
||||
public void Vtbl([Range(0u, 6u)] uint vm, // Indices, include potentially invalid.
|
||||
[Range(4u, 12u)] uint vn, // Selection.
|
||||
[Values(0u, 1u)] uint vd, // Destinations.
|
||||
[Range(0u, 3u)] uint length,
|
||||
[Values] bool x)
|
||||
[Theory(DisplayName = "VTBL.8 <Dd>, {list}, <Dm>")]
|
||||
[PairwiseData]
|
||||
public void Vtbl([CombinatorialRange(0u, 6u, 1)] uint vm, // Indices, include potentially invalid.
|
||||
[CombinatorialRange(4u, 12u, 1)] uint vn, // Selection.
|
||||
[CombinatorialValues(0u, 1u)] uint vd, // Destinations.
|
||||
[CombinatorialRange(0u, 3u, 1)] uint length,
|
||||
bool x)
|
||||
{
|
||||
uint opcode = 0xf3b00800u; // VTBL.8 D0, {D0}, D0
|
||||
if (vn + length > 31)
|
||||
|
|
@ -466,11 +500,11 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (vn & 0xf) << 16;
|
||||
opcode |= (length & 0x3) << 8;
|
||||
|
||||
var rnd = TestContext.CurrentContext.Random;
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v4 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v5 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
var rnd = Random.Shared;
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v4 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v5 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
byte maxIndex = (byte)(length * 8 - 1);
|
||||
byte[] b0 = new byte[16];
|
||||
|
|
@ -489,12 +523,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VEXT.8 {<Vd>,} <Vn>, <Vm>, #<imm>")]
|
||||
public void Vext([Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 15u)] uint imm4,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VEXT.8 {<Vd>,} <Vn>, <Vm>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Vext([CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 15u)] uint imm4,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf2b00000; // VEXT.32 D0, D0, D0, #0
|
||||
|
||||
|
|
@ -517,24 +552,25 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (vn & 0xf) << 16;
|
||||
opcode |= (imm4 & 0xf) << 8;
|
||||
|
||||
V128 v0 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v0 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VDUP.<size> <Vd>, <Rt>")]
|
||||
public void Vdup_GP([Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rt,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCntImm)] uint valueRn,
|
||||
[Random(RndCntImm)] ulong valueVn1,
|
||||
[Random(RndCntImm)] ulong valueVn2,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VDUP.<size> <Vd>, <Rt>")]
|
||||
[PairwiseData]
|
||||
public void Vdup_GP([CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rt,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] uint valueRn,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn2,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xee800b10; // VDUP.32 d0, r0
|
||||
|
||||
|
|
@ -551,21 +587,22 @@ namespace Ryujinx.Tests.Cpu
|
|||
opcode |= (size & 1) << 5; // E
|
||||
opcode |= (size & 2) << 21; // B
|
||||
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, r0: valueRn, r1: valueRn, r2: valueRn, r3: valueRn, v0: new V128(valueVn1, valueVn2), v1: v1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VDUP.<size> <Vd>, <Dm[x]>")]
|
||||
public void Vdup_S([Values(0u, 1u, 2u, 3u)] uint vd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint vm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Range(0u, 7u)] uint index,
|
||||
[Random(RndCntImm)] ulong valueVn1,
|
||||
[Random(RndCntImm)] ulong valueVn2,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VDUP.<size> <Vd>, <Dm[x]>")]
|
||||
[PairwiseData]
|
||||
public void Vdup_S([CombinatorialValues(0u, 1u, 2u, 3u)] uint vd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint vm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRange(0u, 7u, 1)] uint index,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn1,
|
||||
[CombinatorialRandomData(Count = RndCntImm)] ulong valueVn2,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf3b00c00;
|
||||
|
||||
|
|
@ -596,9 +633,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
opcode |= imm4 << 16;
|
||||
|
||||
V128 v1 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v2 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v3 = new(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
|
||||
V128 v1 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v2 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
V128 v3 = new(Random.Shared.NextULong(), Random.Shared.NextULong());
|
||||
|
||||
SingleOpcode(opcode, v0: new V128(valueVn1, valueVn2), v1: v1, v2: v2, v3: v3);
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,12 +1,21 @@
|
|||
// #define SimdReg32
|
||||
#define SimdReg32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
using System.Runtime.InteropServices;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdReg32")]
|
||||
public sealed class CpuTestSimdReg32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdReg32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdReg32
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
|
|
@ -175,7 +184,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
|
|
@ -273,19 +282,20 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Test, Pairwise, Description("SHA256H.32 <Qd>, <Qn>, <Qm>")]
|
||||
public void Sha256h_V([Values(0xF3000C40u)] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(2u)] uint rn,
|
||||
[Values(4u)] uint rm,
|
||||
[Values(0xAEE65C11943FB939ul)] ulong z0,
|
||||
[Values(0xA89A87F110291DA3ul)] ulong z1,
|
||||
[Values(0xE9F766DB7A49EA7Dul)] ulong a0,
|
||||
[Values(0x3053F46B0C2F3507ul)] ulong a1,
|
||||
[Values(0x6E86A473B9D4A778ul)] ulong b0,
|
||||
[Values(0x7BE4F9E638156BB1ul)] ulong b1,
|
||||
[Values(0x1F1DC4A98DA9C132ul)] ulong resultL,
|
||||
[Values(0xDB9A2A7B47031A0Dul)] ulong resultH)
|
||||
[Theory(DisplayName = "SHA256H.32 <Qd>, <Qn>, <Qm>")]
|
||||
[PairwiseData]
|
||||
public void Sha256h_V([CombinatorialValues(0xF3000C40u)] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u)] uint rn,
|
||||
[CombinatorialValues(4u)] uint rm,
|
||||
[CombinatorialValues(0xAEE65C11943FB939ul)] ulong z0,
|
||||
[CombinatorialValues(0xA89A87F110291DA3ul)] ulong z1,
|
||||
[CombinatorialValues(0xE9F766DB7A49EA7Dul)] ulong a0,
|
||||
[CombinatorialValues(0x3053F46B0C2F3507ul)] ulong a1,
|
||||
[CombinatorialValues(0x6E86A473B9D4A778ul)] ulong b0,
|
||||
[CombinatorialValues(0x7BE4F9E638156BB1ul)] ulong b1,
|
||||
[CombinatorialValues(0x1F1DC4A98DA9C132ul)] ulong resultL,
|
||||
[CombinatorialValues(0xDB9A2A7B47031A0Dul)] ulong resultH)
|
||||
{
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
opcode |= ((rn & 0xf) << 16) | ((rn & 0x10) << 3);
|
||||
|
|
@ -299,27 +309,28 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
|
||||
// Unicorn does not yet support hash instructions in A32.
|
||||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SHA256H2.32 <Qd>, <Qn>, <Qm>")]
|
||||
public void Sha256h2_V([Values(0xF3100C40u)] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(2u)] uint rn,
|
||||
[Values(4u)] uint rm,
|
||||
[Values(0xAEE65C11943FB939ul)] ulong z0,
|
||||
[Values(0xA89A87F110291DA3ul)] ulong z1,
|
||||
[Values(0xE9F766DB7A49EA7Dul)] ulong a0,
|
||||
[Values(0x3053F46B0C2F3507ul)] ulong a1,
|
||||
[Values(0x6E86A473B9D4A778ul)] ulong b0,
|
||||
[Values(0x7BE4F9E638156BB1ul)] ulong b1,
|
||||
[Values(0x0A1177E9D9C9B611ul)] ulong resultL,
|
||||
[Values(0xF5A826404928A515ul)] ulong resultH)
|
||||
[Theory(DisplayName = "SHA256H2.32 <Qd>, <Qn>, <Qm>")]
|
||||
[PairwiseData]
|
||||
public void Sha256h2_V([CombinatorialValues(0xF3100C40u)] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u)] uint rn,
|
||||
[CombinatorialValues(4u)] uint rm,
|
||||
[CombinatorialValues(0xAEE65C11943FB939ul)] ulong z0,
|
||||
[CombinatorialValues(0xA89A87F110291DA3ul)] ulong z1,
|
||||
[CombinatorialValues(0xE9F766DB7A49EA7Dul)] ulong a0,
|
||||
[CombinatorialValues(0x3053F46B0C2F3507ul)] ulong a1,
|
||||
[CombinatorialValues(0x6E86A473B9D4A778ul)] ulong b0,
|
||||
[CombinatorialValues(0x7BE4F9E638156BB1ul)] ulong b1,
|
||||
[CombinatorialValues(0x0A1177E9D9C9B611ul)] ulong resultL,
|
||||
[CombinatorialValues(0xF5A826404928A515ul)] ulong resultH)
|
||||
{
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
opcode |= ((rn & 0xf) << 16) | ((rn & 0x10) << 3);
|
||||
|
|
@ -333,27 +344,28 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
|
||||
// Unicorn does not yet support hash instructions in A32.
|
||||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SHA256SU1.32 <Qd>, <Qn>, <Qm>")]
|
||||
public void Sha256su1_V([Values(0xF3200C40u)] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(2u)] uint rn,
|
||||
[Values(4u)] uint rm,
|
||||
[Values(0xAEE65C11943FB939ul)] ulong z0,
|
||||
[Values(0xA89A87F110291DA3ul)] ulong z1,
|
||||
[Values(0xE9F766DB7A49EA7Dul)] ulong a0,
|
||||
[Values(0x3053F46B0C2F3507ul)] ulong a1,
|
||||
[Values(0x6E86A473B9D4A778ul)] ulong b0,
|
||||
[Values(0x7BE4F9E638156BB1ul)] ulong b1,
|
||||
[Values(0x9EE69CC896D7DE66ul)] ulong resultL,
|
||||
[Values(0x004A147155573E54ul)] ulong resultH)
|
||||
[Theory(DisplayName = "SHA256SU1.32 <Qd>, <Qn>, <Qm>")]
|
||||
[PairwiseData]
|
||||
public void Sha256su1_V([CombinatorialValues(0xF3200C40u)] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u)] uint rn,
|
||||
[CombinatorialValues(4u)] uint rm,
|
||||
[CombinatorialValues(0xAEE65C11943FB939ul)] ulong z0,
|
||||
[CombinatorialValues(0xA89A87F110291DA3ul)] ulong z1,
|
||||
[CombinatorialValues(0xE9F766DB7A49EA7Dul)] ulong a0,
|
||||
[CombinatorialValues(0x3053F46B0C2F3507ul)] ulong a1,
|
||||
[CombinatorialValues(0x6E86A473B9D4A778ul)] ulong b0,
|
||||
[CombinatorialValues(0x7BE4F9E638156BB1ul)] ulong b1,
|
||||
[CombinatorialValues(0x9EE69CC896D7DE66ul)] ulong resultL,
|
||||
[CombinatorialValues(0x004A147155573E54ul)] ulong resultH)
|
||||
{
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
opcode |= ((rn & 0xf) << 16) | ((rn & 0x10) << 3);
|
||||
|
|
@ -367,26 +379,26 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
|
||||
Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
|
||||
Assert.Equal(resultL, GetVectorE0(context.GetV(0)));
|
||||
Assert.Equal(resultH, GetVectorE1(context.GetV(0)));
|
||||
});
|
||||
|
||||
// Unicorn does not yet support hash instructions in A32.
|
||||
// CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise, Description("VADD.f32 V0, V0, V0")]
|
||||
public void Vadd_F32([Values(0u)] uint rd,
|
||||
[Values(0u, 1u)] uint rn,
|
||||
[Values(0u, 2u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z1,
|
||||
[ValueSource(nameof(_2S_F_))] ulong a0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong a1,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b1,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VADD.f32 V0, V0, V0")]
|
||||
[PairwiseData]
|
||||
public void Vadd_F32([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rn,
|
||||
[CombinatorialValues(0u, 2u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z1,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong a0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong a1,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b1,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf2000d00u; // VADD.F32 D0, D0, D0
|
||||
if (q)
|
||||
|
|
@ -410,16 +422,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void V_Add_Sub_Long_Wide_I([ValueSource(nameof(_V_Add_Sub_Long_Wide_I_))] uint opcode,
|
||||
[Range(0u, 5u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong z,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong a,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong b,
|
||||
[Values(0u, 1u, 2u)] uint size, // <SU8, SU16, SU32>
|
||||
[Values] bool u) // <S, U>
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void V_Add_Sub_Long_Wide_I([CombinatorialMemberData(nameof(_V_Add_Sub_Long_Wide_I_))] uint opcode,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size, // <SU8, SU16, SU32>
|
||||
bool u) // <S, U>
|
||||
{
|
||||
if (u)
|
||||
{
|
||||
|
|
@ -446,11 +459,12 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VCMP.f<size> Vd, Vm")]
|
||||
public void Vcmp([Values(2u, 3u)] uint size,
|
||||
[ValueSource(nameof(_1S_F_))] ulong a,
|
||||
[ValueSource(nameof(_1S_F_))] ulong b,
|
||||
[Values] bool e)
|
||||
[Theory(DisplayName = "VCMP.f<size> Vd, Vm")]
|
||||
[PairwiseData]
|
||||
public void Vcmp([CombinatorialValues(2u, 3u)] uint size,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong b,
|
||||
bool e)
|
||||
{
|
||||
uint opcode = 0xeeb40840u;
|
||||
uint rm = 1;
|
||||
|
|
@ -476,7 +490,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0(b);
|
||||
|
||||
int fpscr = (int)(TestContext.CurrentContext.Random.NextUInt(0xf) << 28);
|
||||
int fpscr = (int)(Random.Shared.NextUInt(0xf) << 28);
|
||||
|
||||
SingleOpcode(opcode, v1: v1, v2: v2, fpscr: fpscr);
|
||||
|
||||
|
|
@ -484,16 +498,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void Vfma_Vfms_Vfnma_Vfnms_S_F32([ValueSource(nameof(_Vfma_Vfms_Vfnma_Vfnms_S_F32_))] uint opcode,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s0,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s1,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s2,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s3)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vfma_Vfms_Vfnma_Vfnms_S_F32([CombinatorialMemberData(nameof(_Vfma_Vfms_Vfnma_Vfnms_S_F32_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s0,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s1,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s2,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s3)
|
||||
{
|
||||
opcode |= (((rd & 0x1) << 22) | (rd & 0x1e) << 11);
|
||||
opcode |= (((rn & 0x1) << 7) | (rn & 0x1e) << 15);
|
||||
|
|
@ -507,14 +521,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void Vfma_Vfms_Vfnma_Vfnms_S_F64([ValueSource(nameof(_Vfma_Vfms_Vfnma_Vfnms_S_F64_))] uint opcode,
|
||||
[Values(0u, 1u)] uint rd,
|
||||
[Values(0u, 1u)] uint rn,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d0,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d1)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vfma_Vfms_Vfnma_Vfnms_S_F64([CombinatorialMemberData(nameof(_Vfma_Vfms_Vfnma_Vfnms_S_F64_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d1)
|
||||
{
|
||||
opcode |= (((rd & 0x10) << 18) | (rd & 0xf) << 12);
|
||||
opcode |= (((rn & 0x10) << 3) | (rn & 0xf) << 16);
|
||||
|
|
@ -528,17 +542,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void Vfma_Vfms_V_F32([ValueSource(nameof(_Vfma_Vfms_V_F32_))] uint opcode,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d1,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d2,
|
||||
[ValueSource(nameof(_2S_F_))] ulong d3,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vfma_Vfms_V_F32([CombinatorialMemberData(nameof(_Vfma_Vfms_V_F32_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d1,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d2,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong d3,
|
||||
bool q)
|
||||
{
|
||||
if (q)
|
||||
{
|
||||
|
|
@ -564,16 +578,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void Vmla_Vmls_Vnmla_Vnmls_S_F32([ValueSource(nameof(_Vmla_Vmls_Vnmla_Vnmls_S_F32_))] uint opcode,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rd,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rn,
|
||||
[Values(0u, 1u, 2u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s0,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s1,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s2,
|
||||
[ValueSource(nameof(_1S_F_))] ulong s3)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vmla_Vmls_Vnmla_Vnmls_S_F32([CombinatorialMemberData(nameof(_Vmla_Vmls_Vnmla_Vnmls_S_F32_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s0,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s1,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s2,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong s3)
|
||||
{
|
||||
opcode |= (((rd & 0x1) << 22) | (rd & 0x1e) << 11);
|
||||
opcode |= (((rn & 0x1) << 7) | (rn & 0x1e) << 15);
|
||||
|
|
@ -586,14 +600,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void Vmla_Vmls_Vnmla_Vnmls_S_F64([ValueSource(nameof(_Vmla_Vmls_Vnmla_Vnmls_S_F64_))] uint opcode,
|
||||
[Values(0u, 1u)] uint rd,
|
||||
[Values(0u, 1u)] uint rn,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d0,
|
||||
[ValueSource(nameof(_1D_F_))] ulong d1)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vmla_Vmls_Vnmla_Vnmls_S_F64([CombinatorialMemberData(nameof(_Vmla_Vmls_Vnmla_Vnmls_S_F64_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong d1)
|
||||
{
|
||||
opcode |= (((rd & 0x10) << 18) | (rd & 0xf) << 12);
|
||||
opcode |= (((rn & 0x10) << 3) | (rn & 0xf) << 16);
|
||||
|
|
@ -606,16 +620,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vmlal_Vmlsl_I([ValueSource(nameof(_Vmlal_Vmlsl_V_I_))] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool u)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vmlal_Vmlsl_I([CombinatorialMemberData(nameof(_Vmlal_Vmlsl_V_I_))] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool u)
|
||||
{
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
|
|
@ -637,16 +652,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMULL.<size> <Vd>, <Vn>, <Vm>")]
|
||||
public void Vmull_I([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool op,
|
||||
[Values] bool u)
|
||||
[Theory(DisplayName = "VMULL.<size> <Vd>, <Vn>, <Vm>")]
|
||||
[PairwiseData]
|
||||
public void Vmull_I([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool op,
|
||||
bool u)
|
||||
{
|
||||
uint opcode = 0xf2800c00u; // VMULL.S8 Q0, D0, D0
|
||||
|
||||
|
|
@ -677,13 +693,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMULL.<P8, P64> <Qd>, <Dn>, <Dm>")]
|
||||
public void Vmull_I_P8_P64([Values(0u, 1u)] uint rd,
|
||||
[Values(0u, 1u)] uint rn,
|
||||
[Values(0u, 1u)] uint rm,
|
||||
[ValueSource(nameof(_8B1D_))] ulong d0,
|
||||
[ValueSource(nameof(_8B1D_))] ulong d1,
|
||||
[Values(0u/*, 2u*/)] uint size) // <P8, P64>
|
||||
[Theory(DisplayName = "VMULL.<P8, P64> <Qd>, <Dn>, <Dm>")]
|
||||
[PairwiseData]
|
||||
public void Vmull_I_P8_P64([CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(0u, 1u)] uint rn,
|
||||
[CombinatorialValues(0u, 1u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B1D_))] ulong d0,
|
||||
[CombinatorialMemberData(nameof(_8B1D_))] ulong d1,
|
||||
[CombinatorialValues(0u/*, 2u*/)] uint size) // <P8, P64>
|
||||
{
|
||||
/*if (size == 2u)
|
||||
{
|
||||
|
|
@ -708,21 +725,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VSHL.<size> {<Vd>}, <Vm>, <Vn>")]
|
||||
public void Vshl([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool q,
|
||||
[Values] bool u)
|
||||
[Theory(DisplayName = "VSHL.<size> {<Vd>}, <Vm>, <Vn>")]
|
||||
[PairwiseData]
|
||||
public void Vshl([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool q,
|
||||
bool u)
|
||||
{
|
||||
if (RuntimeInformation.ProcessArchitecture == Architecture.Arm64)
|
||||
{
|
||||
Assert.Ignore("Unicorn on ARM64 crash while executing this test");
|
||||
}
|
||||
Skip.If(RuntimeInformation.ProcessArchitecture == Architecture.Arm64, "Unicorn on ARM64 crashes while executing this test");
|
||||
|
||||
uint opcode = 0xf2000400u; // VSHL.S8 D0, D0, D0
|
||||
if (q)
|
||||
|
|
@ -753,18 +768,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Explicit]
|
||||
[Test, Pairwise]
|
||||
public void Vp_Add_Max_Min_F([ValueSource(nameof(_Vp_Add_Max_Min_F_))] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Range(0u, 7u)] uint rn,
|
||||
[Range(0u, 7u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z1,
|
||||
[ValueSource(nameof(_2S_F_))] ulong a0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong a1,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b0,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b1)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vp_Add_Max_Min_F([CombinatorialMemberData(nameof(_Vp_Add_Max_Min_F_))] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialRange(0u, 7u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 7u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z1,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong a0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong a1,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b0,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b1)
|
||||
{
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
|
|
@ -779,15 +794,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vp_Add_I([ValueSource(nameof(_Vp_Add_I_))] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vp_Add_I([CombinatorialMemberData(nameof(_Vp_Add_I_))] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b)
|
||||
{
|
||||
opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
|
||||
opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
|
||||
|
|
@ -804,16 +820,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void V_Pmax_Pmin_Rhadd_I([ValueSource(nameof(_V_Pmax_Pmin_Rhadd_I_))] uint opcode,
|
||||
[Values(0u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool u)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void V_Pmax_Pmin_Rhadd_I([CombinatorialMemberData(nameof(_V_Pmax_Pmin_Rhadd_I_))] uint opcode,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool u)
|
||||
{
|
||||
if (u)
|
||||
{
|
||||
|
|
@ -835,16 +852,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vq_Add_Sub_I([ValueSource(nameof(_Vq_Add_Sub_I_))] uint opcode,
|
||||
[Range(0u, 5u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong z,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong a,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong b,
|
||||
[Values(0u, 1u, 2u)] uint size, // <SU8, SU16, SU32>
|
||||
[Values] bool u) // <S, U>
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vq_Add_Sub_I([CombinatorialMemberData(nameof(_Vq_Add_Sub_I_))] uint opcode,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size, // <SU8, SU16, SU32>
|
||||
bool u) // <S, U>
|
||||
{
|
||||
if (u)
|
||||
{
|
||||
|
|
@ -873,14 +891,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VQDMULH.<S16, S32> <Qd>, <Qn>, <Qm>")]
|
||||
public void Vqdmulh_I([Range(0u, 5u)] uint rd,
|
||||
[Range(0u, 5u)] uint rn,
|
||||
[Range(0u, 5u)] uint rm,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong z,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong a,
|
||||
[ValueSource(nameof(_8B4H2S1D_))] ulong b,
|
||||
[Values(1u, 2u)] uint size) // <S16, S32>
|
||||
[Theory(DisplayName = "VQDMULH.<S16, S32> <Qd>, <Qn>, <Qm>")]
|
||||
[PairwiseData]
|
||||
public void Vqdmulh_I([CombinatorialRange(0u, 5u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rn,
|
||||
[CombinatorialRange(0u, 5u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_8B4H2S1D_))] ulong b,
|
||||
[CombinatorialValues(1u, 2u)] uint size) // <S16, S32>
|
||||
{
|
||||
rd >>= 1;
|
||||
rd <<= 1;
|
||||
|
|
|
|||
|
|
@ -1,12 +1,18 @@
|
|||
// #define SimdRegElem
|
||||
#define SimdRegElem
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdRegElem")]
|
||||
public sealed class CpuTestSimdRegElem : CpuTest
|
||||
{
|
||||
public CpuTestSimdRegElem(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdRegElem
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -80,16 +86,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
#endregion
|
||||
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H([ValueSource(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[ValueSource(nameof(_4H_))] ulong b,
|
||||
[Values(0u, 7u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H([CombinatorialMemberData(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong b,
|
||||
[CombinatorialValues(0u, 7u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
uint h = (index >> 2) & 1;
|
||||
uint l = (index >> 1) & 1;
|
||||
|
|
@ -108,16 +115,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S([ValueSource(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[ValueSource(nameof(_2S_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S([CombinatorialMemberData(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint h = (index >> 1) & 1;
|
||||
uint l = index & 1;
|
||||
|
|
@ -135,16 +143,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S([ValueSource(nameof(_SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[ValueSource(nameof(_4H_))] ulong b,
|
||||
[Values(0u, 7u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H4S, 8H4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S([CombinatorialMemberData(nameof(_SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong b,
|
||||
[CombinatorialValues(0u, 7u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H4S, 8H4S>
|
||||
{
|
||||
uint h = (index >> 2) & 1;
|
||||
uint l = (index >> 1) & 1;
|
||||
|
|
@ -163,16 +172,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D([ValueSource(nameof(_SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[ValueSource(nameof(_2S_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S2D, 4S2D>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D([CombinatorialMemberData(nameof(_SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S2D, 4S2D>
|
||||
{
|
||||
uint h = (index >> 1) & 1;
|
||||
uint l = index & 1;
|
||||
|
|
|
|||
|
|
@ -1,24 +1,31 @@
|
|||
// #define SimdRegElem32
|
||||
#define SimdRegElem32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdRegElem32")]
|
||||
public sealed class CpuTestSimdRegElem32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdRegElem32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdRegElem32
|
||||
private const int RndCnt = 2;
|
||||
|
||||
[Test, Pairwise, Description("VMUL.<size> {<Vd>}, <Vn>, <Vm>[<index>]")]
|
||||
public void Vmul_1I([Values(1u, 0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(26u, 25u, 10u, 9u, 2u, 0u)] uint rm,
|
||||
[Values(1u, 2u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VMUL.<size> {<Vd>}, <Vn>, <Vm>[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Vmul_1I([CombinatorialValues(1u, 0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(26u, 25u, 10u, 9u, 2u, 0u)] uint rm,
|
||||
[CombinatorialValues(1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf2900840u & ~(3u << 20); // VMUL.I16 D0, D0, D0[0]
|
||||
if (q)
|
||||
|
|
@ -43,15 +50,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VMULL.<size> <Vd>, <Vn>, <Vm>[<index>]")]
|
||||
public void Vmull_1([Values(2u, 0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(26u, 25u, 10u, 9u, 2u, 0u)] uint rm,
|
||||
[Values(1u, 2u)] uint size,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool u)
|
||||
[Theory(DisplayName = "VMULL.<size> <Vd>, <Vn>, <Vm>[<index>]")]
|
||||
[PairwiseData]
|
||||
public void Vmull_1([CombinatorialValues(2u, 0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(26u, 25u, 10u, 9u, 2u, 0u)] uint rm,
|
||||
[CombinatorialValues(1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool u)
|
||||
{
|
||||
uint opcode = 0xf2900a40u & ~(3u << 20); // VMULL.S16 Q0, D0, D0[0]
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdRegElemF
|
||||
#define SimdRegElemF
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using System.Collections.Generic;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdRegElemF")]
|
||||
public sealed class CpuTestSimdRegElemF : CpuTest
|
||||
{
|
||||
public CpuTestSimdRegElemF(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdRegElemF
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -43,7 +51,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong grbg = Random.Shared.NextUInt();
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
|
|
@ -216,13 +224,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noNaNs = false;
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mla_Mls_Se_S([ValueSource(nameof(_F_Mla_Mls_Se_S_))] uint opcodes,
|
||||
[ValueSource(nameof(_1S_F_))] ulong z,
|
||||
[ValueSource(nameof(_1S_F_))] ulong a,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mla_Mls_Se_S([CombinatorialMemberData(nameof(_F_Mla_Mls_Se_S_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index)
|
||||
{
|
||||
uint h = (index >> 1) & 1;
|
||||
uint l = index & 1;
|
||||
|
|
@ -233,7 +241,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -244,13 +252,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mla_Mls_Se_D([ValueSource(nameof(_F_Mla_Mls_Se_D_))] uint opcodes,
|
||||
[ValueSource(nameof(_1D_F_))] ulong z,
|
||||
[ValueSource(nameof(_1D_F_))] ulong a,
|
||||
[ValueSource(nameof(_1D_F_))] ulong b,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mla_Mls_Se_D([CombinatorialMemberData(nameof(_F_Mla_Mls_Se_D_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
uint h = index & 1;
|
||||
|
||||
|
|
@ -260,7 +268,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -271,17 +279,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mla_Mls_Ve_2S_4S([ValueSource(nameof(_F_Mla_Mls_Ve_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z,
|
||||
[ValueSource(nameof(_2S_F_))] ulong a,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mla_Mls_Ve_2S_4S([CombinatorialMemberData(nameof(_F_Mla_Mls_Ve_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint h = (index >> 1) & 1;
|
||||
uint l = index & 1;
|
||||
|
|
@ -294,7 +302,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0E1(a, a * q);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -305,16 +313,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
|
||||
// Fused.
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mla_Mls_Ve_2D([ValueSource(nameof(_F_Mla_Mls_Ve_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong z,
|
||||
[ValueSource(nameof(_1D_F_))] ulong a,
|
||||
[ValueSource(nameof(_1D_F_))] ulong b,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mla_Mls_Ve_2D([CombinatorialMemberData(nameof(_F_Mla_Mls_Ve_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
uint h = index & 1;
|
||||
|
||||
|
|
@ -325,7 +333,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -335,24 +343,24 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(Fpsr.Ioc | Fpsr.Idc, FpSkips.IfUnderflow, FpTolerances.UpToOneUlpsD);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mul_Mulx_Se_S([ValueSource(nameof(_F_Mul_Mulx_Se_S_))] uint opcodes,
|
||||
[ValueSource(nameof(_1S_F_))] ulong a,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mul_Mulx_Se_S([CombinatorialMemberData(nameof(_F_Mul_Mulx_Se_S_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index)
|
||||
{
|
||||
uint h = (index >> 1) & 1;
|
||||
uint l = index & 1;
|
||||
|
||||
opcodes |= (l << 21) | (h << 11);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -362,23 +370,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Idc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mul_Mulx_Se_D([ValueSource(nameof(_F_Mul_Mulx_Se_D_))] uint opcodes,
|
||||
[ValueSource(nameof(_1D_F_))] ulong a,
|
||||
[ValueSource(nameof(_1D_F_))] ulong b,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mul_Mulx_Se_D([CombinatorialMemberData(nameof(_F_Mul_Mulx_Se_D_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
uint h = index & 1;
|
||||
|
||||
opcodes |= h << 11;
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -388,17 +396,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Idc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mul_Mulx_Ve_2S_4S([ValueSource(nameof(_F_Mul_Mulx_Ve_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_2S_F_))] ulong z,
|
||||
[ValueSource(nameof(_2S_F_))] ulong a,
|
||||
[ValueSource(nameof(_2S_F_))] ulong b,
|
||||
[Values(0u, 1u, 2u, 3u)] uint index,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mul_Mulx_Ve_2S_4S([CombinatorialMemberData(nameof(_F_Mul_Mulx_Ve_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_2S_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint index,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint h = (index >> 1) & 1;
|
||||
uint l = index & 1;
|
||||
|
|
@ -411,7 +419,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0E1(a, a * q);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
@ -421,16 +429,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Idc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Mul_Mulx_Ve_2D([ValueSource(nameof(_F_Mul_Mulx_Ve_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[ValueSource(nameof(_1D_F_))] ulong z,
|
||||
[ValueSource(nameof(_1D_F_))] ulong a,
|
||||
[ValueSource(nameof(_1D_F_))] ulong b,
|
||||
[Values(0u, 1u)] uint index)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Mul_Mulx_Ve_2D([CombinatorialMemberData(nameof(_F_Mul_Mulx_Ve_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong a,
|
||||
[CombinatorialMemberData(nameof(_1D_F_))] ulong b,
|
||||
[CombinatorialValues(0u, 1u)] uint index)
|
||||
{
|
||||
uint h = index & 1;
|
||||
|
||||
|
|
@ -441,7 +449,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0E1(a, a);
|
||||
V128 v2 = MakeVectorE0E1(b, b * h);
|
||||
|
||||
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
|
||||
int rnd = (int)Random.Shared.NextUInt();
|
||||
|
||||
int fpcr = rnd & (1 << (int)Fpcr.Fz);
|
||||
fpcr |= rnd & (1 << (int)Fpcr.Dn);
|
||||
|
|
|
|||
|
|
@ -1,12 +1,20 @@
|
|||
// #define SimdShImm
|
||||
#define SimdShImm
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdShImm")]
|
||||
public sealed class CpuTestSimdShImm : CpuTest
|
||||
{
|
||||
public CpuTestSimdShImm(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdShImm
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -104,8 +112,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits((int)TestContext.CurrentContext.Random.NextUInt());
|
||||
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(TestContext.CurrentContext.Random.NextUInt());
|
||||
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits((int)Random.Shared.NextUInt());
|
||||
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(Random.Shared.NextUInt());
|
||||
|
||||
ulong rnd3 = GenNormalS();
|
||||
ulong rnd4 = GenSubnormalS();
|
||||
|
|
@ -165,9 +173,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong rnd1 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||
(long)TestContext.CurrentContext.Random.NextULong());
|
||||
(long)Random.Shared.NextULong());
|
||||
ulong rnd2 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||
TestContext.CurrentContext.Random.NextULong());
|
||||
Random.Shared.NextULong());
|
||||
|
||||
ulong rnd3 = GenNormalD();
|
||||
ulong rnd4 = GenSubnormalD();
|
||||
|
|
@ -540,15 +548,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
private static readonly bool _noInfs = false;
|
||||
private static readonly bool _noNaNs = false;
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_Z_SU_V_Fixed_2S_4S([ValueSource(nameof(_F_Cvt_Z_SU_V_Fixed_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_F_W_))] ulong z,
|
||||
[ValueSource(nameof(_2S_F_W_))] ulong a,
|
||||
[Values(1u, 32u)] uint fBits,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_Z_SU_V_Fixed_2S_4S([CombinatorialMemberData(nameof(_F_Cvt_Z_SU_V_Fixed_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_F_W_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_F_W_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint immHb = (64 - fBits) & 0x7F;
|
||||
|
||||
|
|
@ -564,14 +572,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void F_Cvt_Z_SU_V_Fixed_2D([ValueSource(nameof(_F_Cvt_Z_SU_V_Fixed_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_F_X_))] ulong z,
|
||||
[ValueSource(nameof(_1D_F_X_))] ulong a,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void F_Cvt_Z_SU_V_Fixed_2D([CombinatorialMemberData(nameof(_F_Cvt_Z_SU_V_Fixed_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_F_X_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_F_X_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint immHb = (128 - fBits) & 0x7F;
|
||||
|
||||
|
|
@ -586,17 +594,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_S_Fixed_S([ValueSource(nameof(_SU_Cvt_F_S_Fixed_S_))] uint opcodes,
|
||||
[ValueSource(nameof(_1S_))] ulong a,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_S_Fixed_S([CombinatorialMemberData(nameof(_SU_Cvt_F_S_Fixed_S_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1S_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits)
|
||||
{
|
||||
uint immHb = (64 - fBits) & 0x7F;
|
||||
|
||||
opcodes |= (immHb << 16);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
|
|
@ -605,17 +613,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_S_Fixed_D([ValueSource(nameof(_SU_Cvt_F_S_Fixed_D_))] uint opcodes,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_S_Fixed_D([CombinatorialMemberData(nameof(_SU_Cvt_F_S_Fixed_D_))] uint opcodes,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint immHb = (128 - fBits) & 0x7F;
|
||||
|
||||
opcodes |= (immHb << 16);
|
||||
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = Random.Shared.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
V128 v1 = MakeVectorE0(a);
|
||||
|
||||
|
|
@ -624,15 +632,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_V_Fixed_2S_4S([ValueSource(nameof(_SU_Cvt_F_V_Fixed_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(1u, 32u)] uint fBits,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_V_Fixed_2S_4S([CombinatorialMemberData(nameof(_SU_Cvt_F_V_Fixed_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint fBits,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint immHb = (64 - fBits) & 0x7F;
|
||||
|
||||
|
|
@ -648,14 +656,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_V_Fixed_2D([ValueSource(nameof(_SU_Cvt_F_V_Fixed_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Cvt_F_V_Fixed_2D([CombinatorialMemberData(nameof(_SU_Cvt_F_V_Fixed_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint fBits)
|
||||
{
|
||||
uint immHb = (128 - fBits) & 0x7F;
|
||||
|
||||
|
|
@ -670,13 +678,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Shl_Sli_S_D([ValueSource(nameof(_Shl_Sli_S_D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(0u, 63u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Shl_Sli_S_D([CombinatorialMemberData(nameof(_Shl_Sli_S_D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(0u, 63u)] uint shift)
|
||||
{
|
||||
uint immHb = (64 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -691,14 +700,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Shl_Sli_V_8B_16B([ValueSource(nameof(_Shl_Sli_V_8B_16B_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 7u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Shl_Sli_V_8B_16B([CombinatorialMemberData(nameof(_Shl_Sli_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
uint immHb = (8 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -714,14 +724,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Shl_Sli_V_4H_8H([ValueSource(nameof(_Shl_Sli_V_4H_8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 15u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Shl_Sli_V_4H_8H([CombinatorialMemberData(nameof(_Shl_Sli_V_4H_8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
uint immHb = (16 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -737,14 +748,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Shl_Sli_V_2S_4S([ValueSource(nameof(_Shl_Sli_V_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 31u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Shl_Sli_V_2S_4S([CombinatorialMemberData(nameof(_Shl_Sli_V_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 31u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint immHb = (32 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -760,13 +772,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Shl_Sli_V_2D([ValueSource(nameof(_Shl_Sli_V_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(0u, 63u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Shl_Sli_V_2D([CombinatorialMemberData(nameof(_Shl_Sli_V_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(0u, 63u)] uint shift)
|
||||
{
|
||||
uint immHb = (64 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -781,14 +794,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void SU_Shll_V_8B8H_16B8H([ValueSource(nameof(_SU_Shll_V_8B8H_16B8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(0u, 7u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8B8H, 16B8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Shll_V_8B8H_16B8H([CombinatorialMemberData(nameof(_SU_Shll_V_8B8H_16B8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(0u, 7u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B8H, 16B8H>
|
||||
{
|
||||
uint immHb = (8 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -804,14 +818,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void SU_Shll_V_4H4S_8H4S([ValueSource(nameof(_SU_Shll_V_4H4S_8H4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(0u, 15u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H4S, 8H4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Shll_V_4H4S_8H4S([CombinatorialMemberData(nameof(_SU_Shll_V_4H4S_8H4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(0u, 15u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H4S, 8H4S>
|
||||
{
|
||||
uint immHb = (16 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -827,14 +842,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void SU_Shll_V_2S2D_4S2D([ValueSource(nameof(_SU_Shll_V_2S2D_4S2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(0u, 31u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S2D, 4S2D>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SU_Shll_V_2S2D_4S2D([CombinatorialMemberData(nameof(_SU_Shll_V_2S2D_4S2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(0u, 31u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S2D, 4S2D>
|
||||
{
|
||||
uint immHb = (32 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -850,13 +866,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShlImm_S_D([ValueSource(nameof(_ShlImm_S_D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 64u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShlImm_S_D([CombinatorialMemberData(nameof(_ShlImm_S_D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint shift)
|
||||
{
|
||||
uint immHb = (64 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -871,14 +888,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShlImm_V_8B_16B([ValueSource(nameof(_ShlImm_V_8B_16B_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(1u, 8u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShlImm_V_8B_16B([CombinatorialMemberData(nameof(_ShlImm_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(1u, 8u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
uint immHb = (8 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -894,14 +912,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShlImm_V_4H_8H([ValueSource(nameof(_ShlImm_V_4H_8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(1u, 16u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShlImm_V_4H_8H([CombinatorialMemberData(nameof(_ShlImm_V_4H_8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(1u, 16u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
uint immHb = (16 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -917,14 +936,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShlImm_V_2S_4S([ValueSource(nameof(_ShlImm_V_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(1u, 32u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShlImm_V_2S_4S([CombinatorialMemberData(nameof(_ShlImm_V_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint immHb = (32 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -940,13 +960,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShlImm_V_2D([ValueSource(nameof(_ShlImm_V_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 64u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShlImm_V_2D([CombinatorialMemberData(nameof(_ShlImm_V_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint shift)
|
||||
{
|
||||
uint immHb = (64 + shift) & 0x7F;
|
||||
|
||||
|
|
@ -961,13 +982,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImm_Sri_S_D([ValueSource(nameof(_ShrImm_Sri_S_D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 64u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImm_Sri_S_D([CombinatorialMemberData(nameof(_ShrImm_Sri_S_D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint shift)
|
||||
{
|
||||
uint immHb = (128 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -982,14 +1004,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImm_Sri_V_8B_16B([ValueSource(nameof(_ShrImm_Sri_V_8B_16B_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong a,
|
||||
[Values(1u, 8u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImm_Sri_V_8B_16B([CombinatorialMemberData(nameof(_ShrImm_Sri_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong a,
|
||||
[CombinatorialValues(1u, 8u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
uint immHb = (16 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1005,14 +1028,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImm_Sri_V_4H_8H([ValueSource(nameof(_ShrImm_Sri_V_4H_8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(1u, 16u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImm_Sri_V_4H_8H([CombinatorialMemberData(nameof(_ShrImm_Sri_V_4H_8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(1u, 16u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4H, 8H>
|
||||
{
|
||||
uint immHb = (32 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1028,14 +1052,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImm_Sri_V_2S_4S([ValueSource(nameof(_ShrImm_Sri_V_2S_4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(1u, 32u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImm_Sri_V_2S_4S([CombinatorialMemberData(nameof(_ShrImm_Sri_V_2S_4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint immHb = (64 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1051,13 +1076,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImm_Sri_V_2D([ValueSource(nameof(_ShrImm_Sri_V_2D_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 64u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImm_Sri_V_2D([CombinatorialMemberData(nameof(_ShrImm_Sri_V_2D_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 64u)] uint shift)
|
||||
{
|
||||
uint immHb = (128 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1072,14 +1098,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmNarrow_V_8H8B_8H16B([ValueSource(nameof(_ShrImmNarrow_V_8H8B_8H16B_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(1u, 8u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8H8B, 8H16B>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmNarrow_V_8H8B_8H16B([CombinatorialMemberData(nameof(_ShrImmNarrow_V_8H8B_8H16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(1u, 8u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8H8B, 8H16B>
|
||||
{
|
||||
uint immHb = (16 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1095,14 +1122,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmNarrow_V_4S4H_4S8H([ValueSource(nameof(_ShrImmNarrow_V_4S4H_4S8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(1u, 16u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4S4H, 4S8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmNarrow_V_4S4H_4S8H([CombinatorialMemberData(nameof(_ShrImmNarrow_V_4S4H_4S8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(1u, 16u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4S4H, 4S8H>
|
||||
{
|
||||
uint immHb = (32 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1118,14 +1146,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmNarrow_V_2D2S_2D4S([ValueSource(nameof(_ShrImmNarrow_V_2D2S_2D4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 32u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2D2S, 2D4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmNarrow_V_2D2S_2D4S([CombinatorialMemberData(nameof(_ShrImmNarrow_V_2D2S_2D4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2D2S, 2D4S>
|
||||
{
|
||||
uint immHb = (64 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1141,13 +1170,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmSaturatingNarrow_S_HB([ValueSource(nameof(_ShrImmSaturatingNarrow_S_HB_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1H_))] ulong z,
|
||||
[ValueSource(nameof(_1H_))] ulong a,
|
||||
[Values(1u, 8u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmSaturatingNarrow_S_HB([CombinatorialMemberData(nameof(_ShrImmSaturatingNarrow_S_HB_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1H_))] ulong a,
|
||||
[CombinatorialValues(1u, 8u)] uint shift)
|
||||
{
|
||||
uint immHb = (16 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1162,13 +1192,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmSaturatingNarrow_S_SH([ValueSource(nameof(_ShrImmSaturatingNarrow_S_SH_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1S_))] ulong z,
|
||||
[ValueSource(nameof(_1S_))] ulong a,
|
||||
[Values(1u, 16u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmSaturatingNarrow_S_SH([CombinatorialMemberData(nameof(_ShrImmSaturatingNarrow_S_SH_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1S_))] ulong a,
|
||||
[CombinatorialValues(1u, 16u)] uint shift)
|
||||
{
|
||||
uint immHb = (32 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1183,13 +1214,14 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmSaturatingNarrow_S_DS([ValueSource(nameof(_ShrImmSaturatingNarrow_S_DS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 32u)] uint shift)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmSaturatingNarrow_S_DS([CombinatorialMemberData(nameof(_ShrImmSaturatingNarrow_S_DS_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint shift)
|
||||
{
|
||||
uint immHb = (64 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1204,14 +1236,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmSaturatingNarrow_V_8H8B_8H16B([ValueSource(nameof(_ShrImmSaturatingNarrow_V_8H8B_8H16B_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong a,
|
||||
[Values(1u, 8u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <8H8B, 8H16B>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmSaturatingNarrow_V_8H8B_8H16B([CombinatorialMemberData(nameof(_ShrImmSaturatingNarrow_V_8H8B_8H16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong a,
|
||||
[CombinatorialValues(1u, 8u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8H8B, 8H16B>
|
||||
{
|
||||
uint immHb = (16 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1227,14 +1260,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmSaturatingNarrow_V_4S4H_4S8H([ValueSource(nameof(_ShrImmSaturatingNarrow_V_4S4H_4S8H_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong a,
|
||||
[Values(1u, 16u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <4S4H, 4S8H>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmSaturatingNarrow_V_4S4H_4S8H([CombinatorialMemberData(nameof(_ShrImmSaturatingNarrow_V_4S4H_4S8H_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong a,
|
||||
[CombinatorialValues(1u, 16u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <4S4H, 4S8H>
|
||||
{
|
||||
uint immHb = (32 - shift) & 0x7F;
|
||||
|
||||
|
|
@ -1250,14 +1284,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void ShrImmSaturatingNarrow_V_2D2S_2D4S([ValueSource(nameof(_ShrImmSaturatingNarrow_V_2D2S_2D4S_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong a,
|
||||
[Values(1u, 32u)] uint shift,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2D2S, 2D4S>
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ShrImmSaturatingNarrow_V_2D2S_2D4S([CombinatorialMemberData(nameof(_ShrImmSaturatingNarrow_V_2D2S_2D4S_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u, 0u)] uint rn,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong a,
|
||||
[CombinatorialValues(1u, 32u)] uint shift,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <2D2S, 2D4S>
|
||||
{
|
||||
uint immHb = (64 - shift) & 0x7F;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,19 @@
|
|||
// #define SimdShImm32
|
||||
#define SimdShImm32
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdShImm32")]
|
||||
public sealed class CpuTestSimdShImm32 : CpuTest32
|
||||
{
|
||||
public CpuTestSimdShImm32(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdShImm32
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -110,60 +117,64 @@ namespace Ryujinx.Tests.Cpu
|
|||
private const int RndCnt = 2;
|
||||
private const int RndCntShiftImm = 2;
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vshr_Imm_SU8([ValueSource(nameof(_Vshr_Imm_SU8_))] uint opcode,
|
||||
[Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_8B_))] ulong z,
|
||||
[ValueSource(nameof(_8B_))] ulong b,
|
||||
[Values(1u, 8u)] uint shiftImm,
|
||||
[Values] bool u,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vshr_Imm_SU8([CombinatorialMemberData(nameof(_Vshr_Imm_SU8_))] uint opcode,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong b,
|
||||
[CombinatorialValues(1u, 8u)] uint shiftImm,
|
||||
bool u,
|
||||
bool q)
|
||||
{
|
||||
uint imm6 = 16 - shiftImm;
|
||||
|
||||
Vshr_Imm_SU(opcode, rd, rm, z, b, imm6, u, q);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vshr_Imm_SU16([ValueSource(nameof(_Vshr_Imm_SU16_))] uint opcode,
|
||||
[Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_4H_))] ulong z,
|
||||
[ValueSource(nameof(_4H_))] ulong b,
|
||||
[Values(1u, 16u)] uint shiftImm,
|
||||
[Values] bool u,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vshr_Imm_SU16([CombinatorialMemberData(nameof(_Vshr_Imm_SU16_))] uint opcode,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_4H_))] ulong b,
|
||||
[CombinatorialValues(1u, 16u)] uint shiftImm,
|
||||
bool u,
|
||||
bool q)
|
||||
{
|
||||
uint imm6 = 32 - shiftImm;
|
||||
|
||||
Vshr_Imm_SU(opcode, rd, rm, z, b, imm6, u, q);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vshr_Imm_SU32([ValueSource(nameof(_Vshr_Imm_SU32_))] uint opcode,
|
||||
[Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_2S_))] ulong z,
|
||||
[ValueSource(nameof(_2S_))] ulong b,
|
||||
[Values(1u, 32u)] uint shiftImm,
|
||||
[Values] bool u,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vshr_Imm_SU32([CombinatorialMemberData(nameof(_Vshr_Imm_SU32_))] uint opcode,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_2S_))] ulong b,
|
||||
[CombinatorialValues(1u, 32u)] uint shiftImm,
|
||||
bool u,
|
||||
bool q)
|
||||
{
|
||||
uint imm6 = 64 - shiftImm;
|
||||
|
||||
Vshr_Imm_SU(opcode, rd, rm, z, b, imm6, u, q);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vshr_Imm_SU64([ValueSource(nameof(_Vshr_Imm_SU64_))] uint opcode,
|
||||
[Range(0u, 3u)] uint rd,
|
||||
[Range(0u, 3u)] uint rm,
|
||||
[ValueSource(nameof(_1D_))] ulong z,
|
||||
[ValueSource(nameof(_1D_))] ulong b,
|
||||
[Values(1u, 64u)] uint shiftImm,
|
||||
[Values] bool u,
|
||||
[Values] bool q)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vshr_Imm_SU64([CombinatorialMemberData(nameof(_Vshr_Imm_SU64_))] uint opcode,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rd,
|
||||
[CombinatorialRange(0u, 3u, 1)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_1D_))] ulong b,
|
||||
[CombinatorialValues(1u, 64u)] uint shiftImm,
|
||||
bool u,
|
||||
bool q)
|
||||
{
|
||||
uint imm6 = 64 - shiftImm;
|
||||
|
||||
|
|
@ -200,15 +211,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VSHL.<size> {<Vd>}, <Vm>, #<imm>")]
|
||||
public void Vshl_Imm([Values(0u)] uint rd,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u, 3u)] uint size,
|
||||
[Random(RndCntShiftImm)] uint shiftImm,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool q)
|
||||
[Theory(DisplayName = "VSHL.<size> {<Vd>}, <Vm>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Vshl_Imm([CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u, 3u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCntShiftImm)] uint shiftImm,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool q)
|
||||
{
|
||||
uint opcode = 0xf2800510u; // VORR.I32 D0, #0 (immediate value changes it into SHL)
|
||||
if (q)
|
||||
|
|
@ -234,14 +246,15 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("VSHRN.<size> <Vd>, <Vm>, #<imm>")]
|
||||
public void Vshrn_Imm([Values(0u, 1u)] uint rd,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCntShiftImm)] uint shiftImm,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b)
|
||||
[Theory(DisplayName = "VSHRN.<size> <Vd>, <Vm>, #<imm>")]
|
||||
[PairwiseData]
|
||||
public void Vshrn_Imm([CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCntShiftImm)] uint shiftImm,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b)
|
||||
{
|
||||
uint opcode = 0xf2800810u; // VMOV.I16 D0, #0 (immediate value changes it into SHRN)
|
||||
|
||||
|
|
@ -261,16 +274,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vqshrn_Vqrshrn_Vrshrn_Imm([ValueSource(nameof(_Vqshrn_Vqrshrn_Vrshrn_Imm_))] uint opcode,
|
||||
[Values(0u, 1u)] uint rd,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCntShiftImm)] uint shiftImm,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b,
|
||||
[Values] bool u)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vqshrn_Vqrshrn_Vrshrn_Imm([CombinatorialMemberData(nameof(_Vqshrn_Vqrshrn_Vrshrn_Imm_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCntShiftImm)] uint shiftImm,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b,
|
||||
bool u)
|
||||
{
|
||||
uint imm = 1u << ((int)size + 3);
|
||||
imm |= shiftImm & (imm - 1);
|
||||
|
|
@ -288,22 +302,23 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0E1(a, z);
|
||||
V128 v2 = MakeVectorE0E1(b, z);
|
||||
|
||||
int fpscr = (int)TestContext.CurrentContext.Random.NextUInt() & (int)Fpsr.Qc;
|
||||
int fpscr = (int)Random.Shared.NextUInt() & (int)Fpsr.Qc;
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, fpscr: fpscr);
|
||||
|
||||
CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
|
||||
}
|
||||
|
||||
[Test, Pairwise]
|
||||
public void Vqshrun_Vqrshrun_Imm([ValueSource(nameof(_Vqshrun_Vqrshrun_Imm_))] uint opcode,
|
||||
[Values(0u, 1u)] uint rd,
|
||||
[Values(2u, 0u)] uint rm,
|
||||
[Values(0u, 1u, 2u)] uint size,
|
||||
[Random(RndCntShiftImm)] uint shiftImm,
|
||||
[Random(RndCnt)] ulong z,
|
||||
[Random(RndCnt)] ulong a,
|
||||
[Random(RndCnt)] ulong b)
|
||||
[Theory]
|
||||
[PairwiseData]
|
||||
public void Vqshrun_Vqrshrun_Imm([CombinatorialMemberData(nameof(_Vqshrun_Vqrshrun_Imm_))] uint opcode,
|
||||
[CombinatorialValues(0u, 1u)] uint rd,
|
||||
[CombinatorialValues(2u, 0u)] uint rm,
|
||||
[CombinatorialValues(0u, 1u, 2u)] uint size,
|
||||
[CombinatorialRandomData(Count = RndCntShiftImm)] uint shiftImm,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong z,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong a,
|
||||
[CombinatorialRandomData(Count = RndCnt)] ulong b)
|
||||
{
|
||||
uint imm = 1u << ((int)size + 3);
|
||||
imm |= shiftImm & (imm - 1);
|
||||
|
|
@ -316,7 +331,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
V128 v1 = MakeVectorE0E1(a, z);
|
||||
V128 v2 = MakeVectorE0E1(b, z);
|
||||
|
||||
int fpscr = (int)TestContext.CurrentContext.Random.NextUInt() & (int)Fpsr.Qc;
|
||||
int fpscr = (int)Random.Shared.NextUInt() & (int)Fpsr.Qc;
|
||||
|
||||
SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, fpscr: fpscr);
|
||||
|
||||
|
|
|
|||
|
|
@ -4,12 +4,17 @@ using ARMeilleure.State;
|
|||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("SimdTbl")]
|
||||
public sealed class CpuTestSimdTbl : CpuTest
|
||||
{
|
||||
public CpuTestSimdTbl(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if SimdTbl
|
||||
|
||||
#region "Helper methods"
|
||||
|
|
@ -138,28 +143,16 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
private const int RndCntIdxs = 2;
|
||||
|
||||
private static readonly uint[] _testData_rd =
|
||||
{
|
||||
0u,
|
||||
};
|
||||
private static readonly uint[] _testData_rn =
|
||||
{
|
||||
1u,
|
||||
};
|
||||
private static readonly uint[] _testData_rm =
|
||||
{
|
||||
2u,
|
||||
};
|
||||
private static readonly uint[] _testData_q =
|
||||
{
|
||||
0b0u, 0b1u, // <8B, 16B>
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, uint> TestData = new(_SingleRegisterTable_V_8B_16B_(), _testData_rd, _testData_rn, _testData_rm, _8B_(), _8B_(), _GenIdxsForTbl1_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void SingleRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void SingleRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_SingleRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(2u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl1_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
@ -173,17 +166,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_Two_rm =
|
||||
{
|
||||
3u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, ulong, uint> TestData_Two =
|
||||
new(_TwoRegisterTable_V_8B_16B_(), _testData_rd, _testData_rn, _testData_Two_rm, _8B_(), _8B_(), _8B_(), _GenIdxsForTbl2_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Two))]
|
||||
public void TwoRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong table1, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void TwoRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_TwoRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(3u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table1,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl2_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
@ -198,25 +191,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_ModTwo_rd =
|
||||
{
|
||||
30u, 1u,
|
||||
};
|
||||
private static readonly uint[] _testData_ModTwo_rn =
|
||||
{
|
||||
31u,
|
||||
};
|
||||
private static readonly uint[] _testData_ModTwo_rm =
|
||||
{
|
||||
1u, 30u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, ulong, uint> TestData_ModTwo =
|
||||
new(_TwoRegisterTable_V_8B_16B_(), _testData_ModTwo_rd, _testData_ModTwo_rn, _testData_ModTwo_rm, _8B_(), _8B_(), _8B_(), _GenIdxsForTbl2_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_ModTwo))]
|
||||
public void Mod_TwoRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong table1, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Mod_TwoRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_TwoRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(30u, 1u)] uint rd,
|
||||
[CombinatorialValues(31u)] uint rn,
|
||||
[CombinatorialValues(1u, 30u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table1,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl2_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
@ -231,17 +216,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_Three_rm =
|
||||
{
|
||||
4u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, ulong, ulong, uint> TestData_Three =
|
||||
new(_TwoRegisterTable_V_8B_16B_(), _testData_rd, _testData_rn, _testData_Three_rm, _8B_(), _8B_(), _8B_(), _8B_(), _GenIdxsForTbl3_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Three))]
|
||||
public void ThreeRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong table1, ulong table2, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void ThreeRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_ThreeRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(4u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table1,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table2,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl3_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
@ -257,21 +243,18 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_ModThree_rd =
|
||||
{
|
||||
30u, 2u,
|
||||
};
|
||||
private static readonly uint[] _testData_ModThree_rm =
|
||||
{
|
||||
2u, 30u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, ulong, ulong, uint> TestData_ModThree =
|
||||
new(_ThreeRegisterTable_V_8B_16B_(), _testData_ModThree_rd, _testData_ModTwo_rn, _testData_ModThree_rm, _8B_(), _8B_(), _8B_(), _8B_(), _GenIdxsForTbl3_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_ModThree))]
|
||||
public void Mod_ThreeRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong table1, ulong table2, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Mod_ThreeRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_ThreeRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(30u, 2u)] uint rd,
|
||||
[CombinatorialValues(31u)] uint rn,
|
||||
[CombinatorialValues(2u, 30u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table1,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table2,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl3_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
@ -287,17 +270,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_Four_rm =
|
||||
{
|
||||
5u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, ulong, ulong, ulong, uint> TestData_Four =
|
||||
new(_FourRegisterTable_V_8B_16B_(), _testData_rd, _testData_rn, _testData_Four_rm, _8B_(), _8B_(), _8B_(), _8B_(), _8B_(), _GenIdxsForTbl4_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Four))]
|
||||
public void FourRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong table1, ulong table2, ulong table3, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void FourRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_FourRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(0u)] uint rd,
|
||||
[CombinatorialValues(1u)] uint rn,
|
||||
[CombinatorialValues(5u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table1,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table2,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table3,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl4_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
@ -314,21 +299,19 @@ namespace Ryujinx.Tests.Cpu
|
|||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
private static readonly uint[] _testData_ModFour_rd =
|
||||
{
|
||||
30u, 3u,
|
||||
};
|
||||
private static readonly uint[] _testData_ModFour_rm =
|
||||
{
|
||||
3u, 30u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, uint, uint, ulong, ulong, ulong, ulong, ulong, ulong, uint> TestData_ModFour =
|
||||
new(_FourRegisterTable_V_8B_16B_(), _testData_ModFour_rd, _testData_ModTwo_rn, _testData_ModFour_rm, _8B_(), _8B_(), _8B_(), _8B_(), _8B_(), _GenIdxsForTbl4_(), _testData_q);
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_ModFour))]
|
||||
public void Mod_FourRegisterTable_V_8B_16B(uint opcodes, uint rd, uint rn, uint rm, ulong z, ulong table0, ulong table1, ulong table2, ulong table3, ulong indexes, uint q)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void Mod_FourRegisterTable_V_8B_16B([CombinatorialMemberData(nameof(_FourRegisterTable_V_8B_16B_))] uint opcodes,
|
||||
[CombinatorialValues(30u, 3u)] uint rd,
|
||||
[CombinatorialValues(31u)] uint rn,
|
||||
[CombinatorialValues(3u, 30u)] uint rm,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong z,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table0,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table1,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table2,
|
||||
[CombinatorialMemberData(nameof(_8B_))] ulong table3,
|
||||
[CombinatorialMemberData(nameof(_GenIdxsForTbl4_))] ulong indexes,
|
||||
[CombinatorialValues(0b0u, 0b1u)] uint q) // <8B, 16B>
|
||||
{
|
||||
opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
|
|
|||
|
|
@ -4,12 +4,17 @@ using ARMeilleure.State;
|
|||
using System;
|
||||
using System.Collections.Generic;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("System")]
|
||||
public sealed class CpuTestSystem : CpuTest
|
||||
{
|
||||
public CpuTestSystem(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if System
|
||||
|
||||
#region "ValueSource (Types)"
|
||||
|
|
@ -47,16 +52,11 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
#endregion
|
||||
|
||||
private static readonly uint[] _testData_rt =
|
||||
{
|
||||
0u, 1u, 31u,
|
||||
};
|
||||
|
||||
public static readonly MatrixTheoryData<uint, uint, ulong> TestData = new(_MrsMsr_Nzcv_(), _testData_rt, _GenNzcv_());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData))]
|
||||
public void MrsMsr_Nzcv(uint opcodes, uint rt, ulong xt)
|
||||
[SkippableTheory]
|
||||
[PairwiseData]
|
||||
public void MrsMsr_Nzcv([CombinatorialMemberData(nameof(_MrsMsr_Nzcv_))] uint opcodes,
|
||||
[CombinatorialValues(0u, 1u, 31u)] uint rt,
|
||||
[CombinatorialMemberData(nameof(_GenNzcv_))] ulong xt)
|
||||
{
|
||||
opcodes |= (rt & 31) << 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,12 +1,17 @@
|
|||
#define T32Alu
|
||||
#define T32Alu
|
||||
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("T32Alu")]
|
||||
public sealed class CpuTestT32Alu : CpuTest32
|
||||
{
|
||||
public CpuTestT32Alu(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if T32Alu
|
||||
public static readonly PrecomputedThumbTestCase[] RsImmTestCases =
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,14 +1,20 @@
|
|||
#define T32Flow
|
||||
#define T32Flow
|
||||
|
||||
using ARMeilleure.State;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("T32Flow")]
|
||||
public sealed class CpuTestT32Flow : CpuTest32
|
||||
{
|
||||
public CpuTestT32Flow(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if T32Flow
|
||||
|
||||
[Fact]
|
||||
public void TestT32B1()
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,13 +1,18 @@
|
|||
#define T32Mem
|
||||
#define T32Mem
|
||||
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("T32Mem")]
|
||||
public sealed class CpuTestT32Mem : CpuTest32
|
||||
{
|
||||
public CpuTestT32Mem(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if T32Mem
|
||||
public static readonly PrecomputedMemoryThumbTestCase[] ImmTestCases =
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,26 +1,30 @@
|
|||
#define Thumb
|
||||
#define Thumb
|
||||
|
||||
using ARMeilleure.State;
|
||||
using System;
|
||||
using Xunit;
|
||||
using Xunit.Abstractions;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
{
|
||||
[Collection("Thumb")]
|
||||
public sealed class CpuTestThumb : CpuTest32
|
||||
{
|
||||
public CpuTestThumb(ITestOutputHelper testOutputHelper) : base(testOutputHelper)
|
||||
{
|
||||
}
|
||||
|
||||
#if Thumb
|
||||
|
||||
private const int RndCnt = 2;
|
||||
|
||||
private static uint RotateRight(uint value, int count)
|
||||
{
|
||||
return (value >> count) | (value << (32 - count));
|
||||
}
|
||||
|
||||
public static readonly StaticTheoryData TestData_Imm = new(new[] {0u, 2u}, new[] { 1u, 0x1fu }, Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Imm))]
|
||||
public void ShiftImm(uint shiftType, uint shiftImm, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void ShiftImm([CombinatorialRange(0u, 2u, 1u)] uint shiftType, [CombinatorialRange(1u, 0x1fu, 1u)] uint shiftImm, [CombinatorialRandomData(Count = RndCnt)] uint w1, [CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
uint opcode = 0x0000; // MOVS <Rd>, <Rm>, <shift> #<amount>
|
||||
|
||||
|
|
@ -33,22 +37,20 @@ namespace Ryujinx.Tests.Cpu
|
|||
switch (shiftType)
|
||||
{
|
||||
case 0:
|
||||
Assert.Equal(((w2 << (int)shiftImm) & 0xffffffffu), GetContext().GetX(1));
|
||||
Assert.Equal((w2 << (int)shiftImm) & 0xffffffffu, GetContext().GetX(1));
|
||||
break;
|
||||
case 1:
|
||||
Assert.Equal(((w2 >> (int)shiftImm) & 0xffffffffu), GetContext().GetX(1));
|
||||
Assert.Equal((w2 >> (int)shiftImm) & 0xffffffffu, GetContext().GetX(1));
|
||||
break;
|
||||
case 2:
|
||||
Assert.Equal((ulong)(((int)w2 >> (int)shiftImm) & 0xffffffffu), GetContext().GetX(1));
|
||||
Assert.Equal((ulong)((int)w2 >> (int)shiftImm) & 0xffffffffu, GetContext().GetX(1));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
public static readonly StaticTheoryData TestData_Reg = new(RangeUtils.RangeData(0u, 1u, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Reg))]
|
||||
public void AddSubReg(uint op, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void AddSubReg([CombinatorialRange(0u, 1u, 1u)] uint op, [CombinatorialRandomData(Count = RndCnt)] uint w1, [CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
uint opcode = 0x1800; // ADDS <Rd>, <Rn>, <Rm>
|
||||
|
||||
|
|
@ -70,14 +72,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
}
|
||||
|
||||
// TODO: Change StaticTheoryData to work with differently sized lists
|
||||
public static readonly StaticTheoryData TestData_Imm3_1 = new(0u, RangeUtils.RangeData(0u, 7u, 1u), Random.Shared.NextUInt());
|
||||
public static readonly StaticTheoryData TestData_Imm3_2 = new(1u, RangeUtils.RangeData(0u, 7u, 1u), Random.Shared.NextUInt());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_Imm3_1))]
|
||||
[MemberData(nameof(TestData_Imm3_2))]
|
||||
public void AddSubImm3(uint op, uint imm, uint w1)
|
||||
[PairwiseData]
|
||||
public void AddSubImm3([CombinatorialRange(0u, 1u, 1u)] uint op, [CombinatorialRange(0u, 7u, 1u)] uint imm, [CombinatorialRandomData(Count = RndCnt)] uint w1)
|
||||
{
|
||||
uint opcode = 0x1c00; // ADDS <Rd>, <Rn>, #<imm3>
|
||||
|
||||
|
|
@ -98,13 +95,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
}
|
||||
|
||||
public static readonly StaticTheoryData TestData_AluImm1 = new(RangeUtils.RangeData(0u, 3u, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
public static readonly StaticTheoryData TestData_AluImm2 = new(RangeUtils.RangeData(0u, 3u, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_AluImm1))]
|
||||
[MemberData(nameof(TestData_AluImm2))]
|
||||
public void AluImm8(uint op, uint imm, uint w1)
|
||||
[PairwiseData]
|
||||
public void AluImm8([CombinatorialRange(0u, 3u, 1u)] uint op, [CombinatorialRandomData(Count = RndCnt)] uint imm, [CombinatorialRandomData(Count = RndCnt)] uint w1)
|
||||
{
|
||||
imm &= 0xff;
|
||||
|
||||
|
|
@ -141,13 +134,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
}
|
||||
|
||||
public static readonly StaticTheoryData TestData_AluRegLow1 = new(RangeUtils.RangeData(0u, 0xfu, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
public static readonly StaticTheoryData TestData_AluRegLow2 = new(RangeUtils.RangeData(0u, 0xfu, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_AluRegLow1))]
|
||||
[MemberData(nameof(TestData_AluRegLow2))]
|
||||
public void AluRegLow(uint op, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void AluRegLow([CombinatorialRange(0u, 0xfu, 1u)] uint op, [CombinatorialRandomData(Count = RndCnt)] uint w1, [CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
uint opcode = 0x4000; // ANDS <Rdn>, <Rm>
|
||||
|
||||
|
|
@ -232,15 +221,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
}
|
||||
|
||||
public static readonly StaticTheoryData TestData_AluRegHigh1 = new(0u, RangeUtils.RangeData(0u, 13u, 1u), RangeUtils.RangeData(0u, 13u, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
public static readonly StaticTheoryData TestData_AluRegHigh2 = new(1u, RangeUtils.RangeData(0u, 13u, 1u), RangeUtils.RangeData(0u, 13u, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
public static readonly StaticTheoryData TestData_AluRegHigh3 = new(2u, RangeUtils.RangeData(0u, 13u, 1u), RangeUtils.RangeData(0u, 13u, 1u), Random.Shared.NextUInt(), Random.Shared.NextUInt());
|
||||
|
||||
[Theory]
|
||||
[MemberData(nameof(TestData_AluRegHigh1))]
|
||||
[MemberData(nameof(TestData_AluRegHigh2))]
|
||||
[MemberData(nameof(TestData_AluRegHigh3))]
|
||||
public void AluRegHigh(uint op, uint rd, uint rm, uint w1, uint w2)
|
||||
[PairwiseData]
|
||||
public void AluRegHigh([CombinatorialRange(0u, 2u, 1u)] uint op, [CombinatorialRange(0u, 13u, 1u)] uint rd, [CombinatorialRange(0u, 13u, 1u)] uint rm, [CombinatorialRandomData(Count = RndCnt)] uint w1, [CombinatorialRandomData(Count = RndCnt)] uint w2)
|
||||
{
|
||||
if (rd == rm)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in a new issue