From a9f952ad4087010ebf20eac06bed4382b81e97bd Mon Sep 17 00:00:00 2001 From: merry Date: Thu, 10 Feb 2022 22:26:14 +0000 Subject: [PATCH] T16: Implement LDR (literal) --- ARMeilleure/Decoders/IOpCode32Mem.cs | 6 ++++- ARMeilleure/Decoders/OpCodeT16MemLit.cs | 23 +++++++++++++++++++ ARMeilleure/Decoders/OpCodeTable.cs | 1 + ARMeilleure/Instructions/InstEmitMemory32.cs | 2 +- .../Instructions/InstEmitMemoryHelper.cs | 2 +- 5 files changed, 31 insertions(+), 3 deletions(-) create mode 100644 ARMeilleure/Decoders/OpCodeT16MemLit.cs diff --git a/ARMeilleure/Decoders/IOpCode32Mem.cs b/ARMeilleure/Decoders/IOpCode32Mem.cs index 8fdc9dadf..008241fb1 100644 --- a/ARMeilleure/Decoders/IOpCode32Mem.cs +++ b/ARMeilleure/Decoders/IOpCode32Mem.cs @@ -7,5 +7,9 @@ namespace ARMeilleure.Decoders bool WBack { get; } bool IsLoad { get; } + bool Index { get; } + bool Add { get; } + + int Immediate { get; } } -} \ No newline at end of file +} diff --git a/ARMeilleure/Decoders/OpCodeT16MemLit.cs b/ARMeilleure/Decoders/OpCodeT16MemLit.cs new file mode 100644 index 000000000..d9203f61b --- /dev/null +++ b/ARMeilleure/Decoders/OpCodeT16MemLit.cs @@ -0,0 +1,23 @@ +namespace ARMeilleure.Decoders +{ + class OpCodeT16MemLit : OpCodeT16, IOpCode32Mem + { + public int Rt { get; } + public int Rn => 15; + + public bool WBack => false; + public bool IsLoad => true; + public bool Index => true; + public bool Add => true; + + public int Immediate { get; } + + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode, bool inITBlock) => new OpCodeT16MemLit(inst, address, opCode, inITBlock); + public OpCodeT16MemLit(InstDescriptor inst, ulong address, int opCode, bool inITBlock) : base(inst, address, opCode, inITBlock) + { + Rt = (opCode >> 8) & 7; + + Immediate = (opCode & 0xff) << 2; + } + } +} \ No newline at end of file diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs index d69645064..186cdf7f1 100644 --- a/ARMeilleure/Decoders/OpCodeTable.cs +++ b/ARMeilleure/Decoders/OpCodeTable.cs @@ -1004,6 +1004,7 @@ namespace ARMeilleure.Decoders SetT16("01000110xxxxxxxx", InstName.Mov, InstEmit32.Mov, OpCodeT16AluRegHigh.Create); SetT16("010001110xxxx000", InstName.Bx, InstEmit32.Bx, OpCodeT16BReg.Create); SetT16("010001111xxxx000", InstName.Blx, InstEmit32.Blx, OpCodeT16BReg.Create); + SetT16("01001xxxxxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT16MemLit.Create); #endregion FillFastLookupTable(InstA32FastLookup, AllInstA32, ToFastLookupIndexA); diff --git a/ARMeilleure/Instructions/InstEmitMemory32.cs b/ARMeilleure/Instructions/InstEmitMemory32.cs index af9eaf1aa..d285588e4 100644 --- a/ARMeilleure/Instructions/InstEmitMemory32.cs +++ b/ARMeilleure/Instructions/InstEmitMemory32.cs @@ -151,7 +151,7 @@ namespace ARMeilleure.Instructions private static void EmitLoadOrStore(ArmEmitterContext context, int size, AccessType accType) { - OpCode32Mem op = (OpCode32Mem)context.CurrOp; + IOpCode32Mem op = (IOpCode32Mem)context.CurrOp; Operand n = context.Copy(GetIntA32AlignedPC(context, op.Rn)); Operand m = GetMemM(context, setCarry: false); diff --git a/ARMeilleure/Instructions/InstEmitMemoryHelper.cs b/ARMeilleure/Instructions/InstEmitMemoryHelper.cs index 570fb02a4..14a72d53f 100644 --- a/ARMeilleure/Instructions/InstEmitMemoryHelper.cs +++ b/ARMeilleure/Instructions/InstEmitMemoryHelper.cs @@ -551,7 +551,7 @@ namespace ARMeilleure.Instructions case OpCode32MemReg op: return GetIntA32(context, op.Rm); - case OpCode32Mem op: return Const(op.Immediate); + case IOpCode32Mem op: return Const(op.Immediate); case OpCode32SimdMemImm op: return Const(op.Immediate);