From cdb489d0cbd55d024b79bd00377b7241eb1ecbe9 Mon Sep 17 00:00:00 2001 From: merry Date: Sat, 19 Feb 2022 15:59:07 +0000 Subject: [PATCH] Support vectors in write registers --- Ryujinx.HLE/Debugger/Debugger.cs | 67 +++++++++++++++++++++++--------- 1 file changed, 49 insertions(+), 18 deletions(-) diff --git a/Ryujinx.HLE/Debugger/Debugger.cs b/Ryujinx.HLE/Debugger/Debugger.cs index a38f15002..802448b71 100644 --- a/Ryujinx.HLE/Debugger/Debugger.cs +++ b/Ryujinx.HLE/Debugger/Debugger.cs @@ -97,19 +97,47 @@ namespace Ryujinx.HLE.Debugger } } - private bool GdbWriteRegister(ExecutionContext state, int gdbRegId, ulong value) + private bool GdbWriteRegister(ExecutionContext state, int gdbRegId, StringStream ss) { switch (gdbRegId) { case >= 0 and <= 31: - state.SetX(gdbRegId, value); - return true; + { + ulong value = ss.ReadLengthAsHex(16); + state.SetX(gdbRegId, value); + return true; + } case 32: - state.DebugPc = value; - return true; + { + ulong value = ss.ReadLengthAsHex(8); + state.DebugPc = value; + return true; + } case 33: - state.SetPstate((uint)value); - return true; + { + ulong value = ss.ReadLengthAsHex(8); + state.SetPstate((uint)value); + return true; + } + case >= 34 and <= 65: + { + ulong value0 = ss.ReadLengthAsHex(16); + ulong value1 = ss.ReadLengthAsHex(16); + state.SetV(gdbRegId - 34, new V128(value0, value1)); + return true; + } + case 66: + { + ulong value = ss.ReadLengthAsHex(8); + state.Fpsr = (FPSR)value; + return true; + } + case 67: + { + ulong value = ss.ReadLengthAsHex(8); + state.Fpcr = (FPCR)value; + return true; + } default: return false; } @@ -187,10 +215,10 @@ namespace Ryujinx.HLE.Debugger goto unknownCommand; } - CommandReadGeneralRegisters(); + CommandReadRegisters(); break; case 'G': - CommandWriteGeneralRegisters(ss); + CommandWriteRegisters(ss); break; case 'H': { @@ -220,14 +248,13 @@ namespace Ryujinx.HLE.Debugger case 'p': { ulong gdbRegId = ss.ReadRemainingAsHex(); - CommandReadGeneralRegister((int)gdbRegId); + CommandReadRegister((int)gdbRegId); break; } case 'P': { ulong gdbRegId = ss.ReadUntilAsHex('='); - ulong value = ss.ReadRemainingAsHex(); - CommandWriteGeneralRegister((int)gdbRegId, value); + CommandWriteRegister((int)gdbRegId, ss); break; } case 'q': @@ -355,7 +382,7 @@ namespace Ryujinx.HLE.Debugger CommandContinue(null); } - void CommandReadGeneralRegisters() + void CommandReadRegisters() { if (gThread == null) { @@ -373,7 +400,7 @@ namespace Ryujinx.HLE.Debugger Reply(registers); } - void CommandWriteGeneralRegisters(StringStream ss) + void CommandWriteRegisters(StringStream ss) { if (gThread == null) { @@ -384,7 +411,11 @@ namespace Ryujinx.HLE.Debugger var ctx = GetThread(gThread.Value); for (int i = 0; i < GdbRegisterCount; i++) { - GdbWriteRegister(ctx, i, ss.ReadLengthAsLEHex(GdbRegisterHexSize(i))); + if (!GdbWriteRegister(ctx, i, ss)) + { + ReplyError(); + return; + } } if (ss.IsEmpty()) @@ -454,7 +485,7 @@ namespace Ryujinx.HLE.Debugger } } - void CommandReadGeneralRegister(int gdbRegId) + void CommandReadRegister(int gdbRegId) { if (gThread == null) { @@ -474,7 +505,7 @@ namespace Ryujinx.HLE.Debugger } } - void CommandWriteGeneralRegister(int gdbRegId, ulong value) + void CommandWriteRegister(int gdbRegId, StringStream ss) { if (gThread == null) { @@ -483,7 +514,7 @@ namespace Ryujinx.HLE.Debugger } var ctx = GetThread(gThread.Value); - if (GdbWriteRegister(ctx, gdbRegId, value)) + if (GdbWriteRegister(ctx, gdbRegId, ss) && ss.IsEmpty()) { ReplyOK(); }