manuth/Ryujinx
1
0
Fork 0
mirror of https://git.naxdy.org/Mirror/Ryujinx.git synced 2024-11-15 17:45:26 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
Ryujinx/Ryujinx.Tests/Cpu/Tester
History
LDj3SNuD 2ccd995cb2 Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update Bits.cs

* Create CpuTestSimd.cs

* Create CpuTestSimdReg.cs

* Update CpuTestSimd.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update CpuTestSimdReg.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
2018-04-20 12:40:15 -03:00
..
Types Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 2018-04-20 12:40:15 -03:00
Instructions.cs Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 2018-04-20 12:40:15 -03:00
Pseudocode.cs Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 2018-04-20 12:40:15 -03:00