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https://git.naxdy.org/Mirror/Ryujinx.git
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650cc41c02
* Implement remaining shader double-precision instructions * Shader cache version bump
106 lines
4 KiB
C#
106 lines
4 KiB
C#
using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitAluHelper;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void DmnmxR(EmitterContext context)
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{
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InstDmnmxR op = context.GetOp<InstDmnmxR>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcReg(context, op.SrcB, isFP64: true);
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var srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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EmitFmnmx(context, srcA, srcB, srcPred, op.Dest, op.AbsA, op.AbsB, op.NegA, op.NegB, op.WriteCC, isFP64: true);
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}
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public static void DmnmxI(EmitterContext context)
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{
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InstDmnmxI op = context.GetOp<InstDmnmxI>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcImm(context, Imm20ToFloat(op.Imm20), isFP64: true);
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var srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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EmitFmnmx(context, srcA, srcB, srcPred, op.Dest, op.AbsA, op.AbsB, op.NegA, op.NegB, op.WriteCC, isFP64: true);
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}
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public static void DmnmxC(EmitterContext context)
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{
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InstDmnmxC op = context.GetOp<InstDmnmxC>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset, isFP64: true);
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var srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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EmitFmnmx(context, srcA, srcB, srcPred, op.Dest, op.AbsA, op.AbsB, op.NegA, op.NegB, op.WriteCC, isFP64: true);
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}
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public static void FmnmxR(EmitterContext context)
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{
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InstFmnmxR op = context.GetOp<InstFmnmxR>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcReg(context, op.SrcB);
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var srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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EmitFmnmx(context, srcA, srcB, srcPred, op.Dest, op.AbsA, op.AbsB, op.NegA, op.NegB, op.WriteCC);
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}
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public static void FmnmxI(EmitterContext context)
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{
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InstFmnmxI op = context.GetOp<InstFmnmxI>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcImm(context, Imm20ToFloat(op.Imm20));
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var srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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EmitFmnmx(context, srcA, srcB, srcPred, op.Dest, op.AbsA, op.AbsB, op.NegA, op.NegB, op.WriteCC);
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}
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public static void FmnmxC(EmitterContext context)
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{
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InstFmnmxC op = context.GetOp<InstFmnmxC>();
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var srcA = GetSrcReg(context, op.SrcA);
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var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset);
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var srcPred = GetPredicate(context, op.SrcPred, op.SrcPredInv);
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EmitFmnmx(context, srcA, srcB, srcPred, op.Dest, op.AbsA, op.AbsB, op.NegA, op.NegB, op.WriteCC);
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}
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private static void EmitFmnmx(
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EmitterContext context,
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Operand srcA,
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Operand srcB,
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Operand srcPred,
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int rd,
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bool absoluteA,
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bool absoluteB,
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bool negateA,
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bool negateB,
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bool writeCC,
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bool isFP64 = false)
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{
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Instruction fpType = isFP64 ? Instruction.FP64 : Instruction.FP32;
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srcA = context.FPAbsNeg(srcA, absoluteA, negateA, fpType);
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srcB = context.FPAbsNeg(srcB, absoluteB, negateB, fpType);
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Operand resMin = context.FPMinimum(srcA, srcB, fpType);
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Operand resMax = context.FPMaximum(srcA, srcB, fpType);
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Operand res = context.ConditionalSelect(srcPred, resMin, resMax);
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SetDest(context, res, rd, isFP64);
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SetFPZnFlags(context, res, writeCC, fpType);
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}
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}
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} |