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Ryujinx/Ryujinx.Cpu/Jit
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LDj3SNuD 733b6b340b RO optimization. 
Allows the same dynamic module (NRO) to always be remapped to the same base address, so that the Translator can reuse the same dynamic functions in it, without having to retranslate them and thus without having to add them back into the Jit Cache.
2022-09-26 13:29:30 +02:00
..
JitCpuContext.cs RO optimization. 2022-09-26 13:29:30 +02:00
JitEngine.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
JitExecutionContext.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
JitMemoryAllocator.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
JitMemoryBlock.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
MemoryManager.cs RO optimization. 2022-09-26 13:29:30 +02:00
MemoryManagerHostMapped.cs RO optimization. 2022-09-26 13:29:30 +02:00