Ryujinx/ARMeilleure/Decoders
2022-02-11 23:08:02 +00:00
..
Optimizations Add inlined on translation call counting (#2190) 2021-04-18 23:43:53 +02:00
Block.cs Add inlined on translation call counting (#2190) 2021-04-18 23:43:53 +02:00
Condition.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
DataOp.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
Decoder.cs OpCodeTable: Prepare for thumb instructions 2022-02-11 23:08:01 +00:00
DecoderHelper.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
InstDescriptor.cs Set Undefined instruction emitter for Undefined property on InstDescriptor (#957) 2020-02-29 12:12:15 +01:00
InstEmitter.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IntType.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode32.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode32Adr.cs T16: Implement ADR 2022-02-11 23:08:02 +00:00
IOpCode32Alu.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode32AluBf.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
IOpCode32AluImm.cs T16: Implement ADDS, SUBS (3-bit immediate) 2022-02-11 23:08:01 +00:00
IOpCode32AluReg.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
IOpCode32AluRsImm.cs T16: Implement LSL/LSR/ASR (imm) 2022-02-11 23:08:01 +00:00
IOpCode32AluRsReg.cs T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers) 2022-02-11 23:08:02 +00:00
IOpCode32AluUx.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
IOpCode32BImm.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode32BReg.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode32Mem.cs T16: Implement LDR (literal) 2022-02-11 23:08:02 +00:00
IOpCode32MemEx.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
IOpCode32MemMult.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCode32MemReg.cs T16: Implement {LDR,STR}{,H,B,SB,SH} (register) 2022-02-11 23:08:02 +00:00
IOpCode32Simd.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
IOpCode32SimdImm.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
IOpCodeAlu.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeAluImm.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeAluRs.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeAluRx.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeBImm.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeCond.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeLit.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IOpCodeSimd.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
OpCode.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32Alu.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32AluBf.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32AluImm.cs T16: Implement ADDS, SUBS (3-bit immediate) 2022-02-11 23:08:01 +00:00
OpCode32AluImm16.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32AluMla.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32AluReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32AluRsImm.cs T16: Implement LSL/LSR/ASR (imm) 2022-02-11 23:08:01 +00:00
OpCode32AluRsReg.cs T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers) 2022-02-11 23:08:02 +00:00
OpCode32AluUmull.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32AluUx.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32BImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32BReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32Exception.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32Mem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MemImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MemImm8.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MemLdEx.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MemMult.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MemReg.cs T16: Implement {LDR,STR}{,H,B,SB,SH} (register) 2022-02-11 23:08:02 +00:00
OpCode32MemRsImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MemStEx.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32MsrReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32Sat.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32Sat16.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32Simd.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdBase.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdBinary.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdCmpZ.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdCvtFI.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdDupElem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdDupGP.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdExt.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdImm44.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdLong.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMemImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMemMult.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMemPair.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMemSingle.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMovGp.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMovGpDouble.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdMovGpElem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdRegElem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdRegElemLong.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdRegLong.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdRegS.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdRegWide.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdRev.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdS.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdSel.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdShImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdShImmLong.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdShImmNarrow.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdSpecial.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdSqrte.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32SimdTbl.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCode32System.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeAdr.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeAlu.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeAluBinary.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeAluImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeAluRs.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeAluRx.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBfm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBImmAl.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBImmCmp.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBImmCond.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBImmTest.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeBReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeCcmp.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeCcmpImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeCcmpReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeCsel.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeException.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMemEx.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMemImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMemLit.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMemPair.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMemReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMov.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeMul.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimd.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdCvt.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdExt.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdFcond.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdFmov.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdHelper.cs Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960) 2020-03-10 16:17:30 +11:00
OpCodeSimdImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdIns.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdMemImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdMemLit.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdMemMs.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdMemPair.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdMemReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdMemSs.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdReg.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdRegElem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdRegElemF.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdShImm.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSimdTbl.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeSystem.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeT16.cs Decoders: Add InITBlock argument 2022-02-11 23:08:01 +00:00
OpCodeT16AddSubImm3.cs T16: Implement ADDS, SUBS (3-bit immediate) 2022-02-11 23:08:01 +00:00
OpCodeT16AddSubReg.cs T16: Implement ADDS, SUBS (reg) 2022-02-11 23:08:01 +00:00
OpCodeT16Adr.cs T16: Implement ADR 2022-02-11 23:08:02 +00:00
OpCodeT16AluImm8.cs T16: Implement MOVS, CMP, ADDS, SUBS (8-bit immediate) 2022-02-11 23:08:02 +00:00
OpCodeT16AluImmZero.cs T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers) 2022-02-11 23:08:02 +00:00
OpCodeT16AluRegHigh.cs T16: Implement ADD, CMP, MOV (high reg) 2022-02-11 23:08:02 +00:00
OpCodeT16AluRegLow.cs T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers) 2022-02-11 23:08:02 +00:00
OpCodeT16BReg.cs T16: Implement BX 2022-02-11 23:08:01 +00:00
OpCodeT16MemImm5.cs T16: Implement {LDR,STR}{,B,H} (immediate) 2022-02-11 23:08:02 +00:00
OpCodeT16MemLit.cs T16: Implement LDR (literal) 2022-02-11 23:08:02 +00:00
OpCodeT16MemReg.cs T16: Implement {LDR,STR}{,H,B,SB,SH} (register) 2022-02-11 23:08:02 +00:00
OpCodeT16MemSp.cs T16: Implement LDR/STR (SP) 2022-02-11 23:08:02 +00:00
OpCodeT16ShiftImm.cs T16: Implement LSL/LSR/ASR (imm) 2022-02-11 23:08:01 +00:00
OpCodeT16ShiftReg.cs T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers) 2022-02-11 23:08:02 +00:00
OpCodeTable.cs T16: Implement ADR 2022-02-11 23:08:02 +00:00
RegisterSize.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
ShiftType.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00