LDj3SNuD 733b6b340b RO optimization. ... Allows the same dynamic module (NRO) to always be remapped to the same base address, so that the Translator can reuse the same dynamic functions in it, without having to retranslate them and thus without having to add them back into the Jit Cache.		2022-09-26 13:29:30 +02:00
..
CodeGen	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
Common	Clean up rejit queue (#2751)	2022-09-08 20:14:08 -03:00
Decoders	A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694)	2022-09-14 18:18:15 -03:00
Diagnostics	Clean up rejit queue (#2751)	2022-09-08 20:14:08 -03:00
Instructions	A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694)	2022-09-14 18:18:15 -03:00
IntermediateRepresentation	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
Memory	RO optimization.	2022-09-26 13:29:30 +02:00
Signal	Removed unused usings. (#3593)	2022-08-18 18:04:54 +02:00
State	Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693)	2022-09-13 19:51:40 -03:00
Translation	RO optimization.	2022-09-26 13:29:30 +02:00
Allocators.cs	Optimize LSRA (#2563)	2021-10-08 18:15:44 -03:00
ARMeilleure.csproj	Remove usage of Mono.Posix.NETStandard accross all projects (#2906)	2021-12-08 18:24:26 -03:00
Optimizations.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
Statistics.cs	Suppress warnings from fields never used or never assigned (CS0169 and CS0649) (#919)	2020-04-21 07:59:59 +10:00