mirror of
https://git.naxdy.org/Mirror/Ryujinx.git
synced 2024-11-16 01:55:27 +00:00
a731ab3a2a
* Start of the ARMeilleure project * Refactoring around the old IRAdapter, now renamed to PreAllocator * Optimize the LowestBitSet method * Add CLZ support and fix CLS implementation * Add missing Equals and GetHashCode overrides on some structs, misc small tweaks * Implement the ByteSwap IR instruction, and some refactoring on the assembler * Implement the DivideUI IR instruction and fix 64-bits IDIV * Correct constant operand type on CSINC * Move division instructions implementation to InstEmitDiv * Fix destination type for the ConditionalSelect IR instruction * Implement UMULH and SMULH, with new IR instructions * Fix some issues with shift instructions * Fix constant types for BFM instructions * Fix up new tests using the new V128 struct * Update tests * Move DIV tests to a separate file * Add support for calls, and some instructions that depends on them * Start adding support for SIMD & FP types, along with some of the related ARM instructions * Fix some typos and the divide instruction with FP operands * Fix wrong method call on Clz_V * Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes * Implement SIMD logical instructions and more misc. fixes * Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations * Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes * Implement SIMD shift instruction and fix Dup_V * Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table * Fix check with tolerance on tester * Implement FP & SIMD comparison instructions, and some fixes * Update FCVT (Scalar) encoding on the table to support the Half-float variants * Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes * Use old memory access methods, made a start on SIMD memory insts support, some fixes * Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes * Fix arguments count with struct return values, other fixes * More instructions * Misc. fixes and integrate LDj3SNuD fixes * Update tests * Add a faster linear scan allocator, unwinding support on windows, and other changes * Update Ryujinx.HLE * Update Ryujinx.Graphics * Fix V128 return pointer passing, RCX is clobbered * Update Ryujinx.Tests * Update ITimeZoneService * Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks * Use generic GetFunctionPointerForDelegate method and other tweaks * Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics * Remove some unused code on the assembler * Fix REX.W prefix regression on float conversion instructions, add some sort of profiler * Add hardware capability detection * Fix regression on Sha1h and revert Fcm** changes * Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator * Fix silly mistake introduced on last commit on CpuId * Generate inline stack probes when the stack allocation is too large * Initial support for the System-V ABI * Support multiple destination operands * Fix SSE2 VectorInsert8 path, and other fixes * Change placement of XMM callee save and restore code to match other compilers * Rename Dest to Destination and Inst to Instruction * Fix a regression related to calls and the V128 type * Add an extra space on comments to match code style * Some refactoring * Fix vector insert FP32 SSE2 path * Port over the ARM32 instructions * Avoid memory protection races on JIT Cache * Another fix on VectorInsert FP32 (thanks to LDj3SNuD * Float operands don't need to use the same register when VEX is supported * Add a new register allocator, higher quality code for hot code (tier up), and other tweaks * Some nits, small improvements on the pre allocator * CpuThreadState is gone * Allow changing CPU emulators with a config entry * Add runtime identifiers on the ARMeilleure project * Allow switching between CPUs through a config entry (pt. 2) * Change win10-x64 to win-x64 on projects * Update the Ryujinx project to use ARMeilleure * Ensure that the selected register is valid on the hybrid allocator * Allow exiting on returns to 0 (should fix test regression) * Remove register assignments for most used variables on the hybrid allocator * Do not use fixed registers as spill temp * Add missing namespace and remove unneeded using * Address PR feedback * Fix types, etc * Enable AssumeStrictAbiCompliance by default * Ensure that Spill and Fill don't load or store any more than necessary
305 lines
9.6 KiB
C#
305 lines
9.6 KiB
C#
using ARMeilleure.CodeGen.RegisterAllocators;
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using ARMeilleure.Common;
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using ARMeilleure.IntermediateRepresentation;
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using System.Collections.Generic;
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using System.Diagnostics;
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using System.IO;
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namespace ARMeilleure.CodeGen.X86
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{
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class CodeGenContext
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{
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private const int ReservedBytesForJump = 1;
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private Stream _stream;
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public int StreamOffset => (int)_stream.Length;
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public AllocationResult AllocResult { get; }
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public Assembler Assembler { get; }
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public BasicBlock CurrBlock { get; private set; }
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public int CallArgsRegionSize { get; }
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public int XmmSaveRegionSize { get; }
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private long[] _blockOffsets;
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private struct Jump
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{
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public bool IsConditional { get; }
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public X86Condition Condition { get; }
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public BasicBlock Target { get; }
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public long JumpPosition { get; }
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public long RelativeOffset { get; set; }
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public int InstSize { get; set; }
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public Jump(BasicBlock target, long jumpPosition)
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{
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IsConditional = false;
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Condition = 0;
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Target = target;
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JumpPosition = jumpPosition;
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RelativeOffset = 0;
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InstSize = 0;
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}
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public Jump(X86Condition condition, BasicBlock target, long jumpPosition)
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{
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IsConditional = true;
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Condition = condition;
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Target = target;
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JumpPosition = jumpPosition;
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RelativeOffset = 0;
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InstSize = 0;
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}
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}
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private List<Jump> _jumps;
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private X86Condition _jNearCondition;
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private long _jNearPosition;
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private int _jNearLength;
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public CodeGenContext(Stream stream, AllocationResult allocResult, int maxCallArgs, int blocksCount)
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{
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_stream = stream;
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AllocResult = allocResult;
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Assembler = new Assembler(stream);
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CallArgsRegionSize = GetCallArgsRegionSize(allocResult, maxCallArgs, out int xmmSaveRegionSize);
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XmmSaveRegionSize = xmmSaveRegionSize;
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_blockOffsets = new long[blocksCount];
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_jumps = new List<Jump>();
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}
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private int GetCallArgsRegionSize(AllocationResult allocResult, int maxCallArgs, out int xmmSaveRegionSize)
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{
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// We need to add 8 bytes to the total size, as the call to this
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// function already pushed 8 bytes (the return address).
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int intMask = CallingConvention.GetIntCalleeSavedRegisters() & allocResult.IntUsedRegisters;
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int vecMask = CallingConvention.GetVecCalleeSavedRegisters() & allocResult.VecUsedRegisters;
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xmmSaveRegionSize = BitUtils.CountBits(vecMask) * 16;
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int calleeSaveRegionSize = BitUtils.CountBits(intMask) * 8 + xmmSaveRegionSize + 8;
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int argsCount = maxCallArgs;
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if (argsCount < 0)
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{
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// When the function has no calls, argsCount is -1.
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// In this case, we don't need to allocate the shadow space.
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argsCount = 0;
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}
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else if (argsCount < 4)
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{
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// The ABI mandates that the space for at least 4 arguments
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// is reserved on the stack (this is called shadow space).
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argsCount = 4;
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}
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int frameSize = calleeSaveRegionSize + allocResult.SpillRegionSize;
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// TODO: Instead of always multiplying by 16 (the largest possible size of a variable,
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// since a V128 has 16 bytes), we should calculate the exact size consumed by the
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// arguments passed to the called functions on the stack.
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int callArgsAndFrameSize = frameSize + argsCount * 16;
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// Ensure that the Stack Pointer will be aligned to 16 bytes.
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callArgsAndFrameSize = (callArgsAndFrameSize + 0xf) & ~0xf;
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return callArgsAndFrameSize - frameSize;
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}
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public void EnterBlock(BasicBlock block)
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{
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_blockOffsets[block.Index] = _stream.Position;
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CurrBlock = block;
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}
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public void JumpTo(BasicBlock target)
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{
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_jumps.Add(new Jump(target, _stream.Position));
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WritePadding(ReservedBytesForJump);
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}
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public void JumpTo(X86Condition condition, BasicBlock target)
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{
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_jumps.Add(new Jump(condition, target, _stream.Position));
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WritePadding(ReservedBytesForJump);
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}
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public void JumpToNear(X86Condition condition)
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{
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_jNearCondition = condition;
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_jNearPosition = _stream.Position;
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_jNearLength = Assembler.GetJccLength(0);
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_stream.Seek(_jNearLength, SeekOrigin.Current);
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}
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public void JumpHere()
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{
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long currentPosition = _stream.Position;
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_stream.Seek(_jNearPosition, SeekOrigin.Begin);
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long offset = currentPosition - (_jNearPosition + _jNearLength);
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Debug.Assert(_jNearLength == Assembler.GetJccLength(offset), "Relative offset doesn't fit on near jump.");
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Assembler.Jcc(_jNearCondition, offset);
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_stream.Seek(currentPosition, SeekOrigin.Begin);
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}
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private void WritePadding(int size)
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{
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while (size-- > 0)
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{
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_stream.WriteByte(0);
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}
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}
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public byte[] GetCode()
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{
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// Write jump relative offsets.
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bool modified;
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do
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{
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modified = false;
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for (int index = 0; index < _jumps.Count; index++)
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{
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Jump jump = _jumps[index];
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long jumpTarget = _blockOffsets[jump.Target.Index];
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long offset = jumpTarget - jump.JumpPosition;
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if (offset < 0)
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{
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for (int index2 = index - 1; index2 >= 0; index2--)
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{
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Jump jump2 = _jumps[index2];
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if (jump2.JumpPosition < jumpTarget)
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{
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break;
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}
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offset -= jump2.InstSize - ReservedBytesForJump;
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}
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}
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else
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{
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for (int index2 = index + 1; index2 < _jumps.Count; index2++)
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{
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Jump jump2 = _jumps[index2];
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if (jump2.JumpPosition >= jumpTarget)
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{
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break;
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}
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offset += jump2.InstSize - ReservedBytesForJump;
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}
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offset -= ReservedBytesForJump;
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}
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if (jump.IsConditional)
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{
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jump.InstSize = Assembler.GetJccLength(offset);
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}
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else
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{
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jump.InstSize = Assembler.GetJmpLength(offset);
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}
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// The jump is relative to the next instruction, not the current one.
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// Since we didn't know the next instruction address when calculating
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// the offset (as the size of the current jump instruction was not know),
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// we now need to compensate the offset with the jump instruction size.
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// It's also worth to note that:
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// - This is only needed for backward jumps.
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// - The GetJmpLength and GetJccLength also compensates the offset
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// internally when computing the jump instruction size.
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if (offset < 0)
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{
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offset -= jump.InstSize;
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}
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if (jump.RelativeOffset != offset)
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{
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modified = true;
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}
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jump.RelativeOffset = offset;
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_jumps[index] = jump;
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}
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}
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while (modified);
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// Write the code, ignoring the dummy bytes after jumps, into a new stream.
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_stream.Seek(0, SeekOrigin.Begin);
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using (MemoryStream codeStream = new MemoryStream())
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{
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Assembler assembler = new Assembler(codeStream);
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byte[] buffer;
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for (int index = 0; index < _jumps.Count; index++)
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{
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Jump jump = _jumps[index];
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buffer = new byte[jump.JumpPosition - _stream.Position];
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_stream.Read(buffer, 0, buffer.Length);
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_stream.Seek(ReservedBytesForJump, SeekOrigin.Current);
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codeStream.Write(buffer);
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if (jump.IsConditional)
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{
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assembler.Jcc(jump.Condition, jump.RelativeOffset);
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}
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else
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{
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assembler.Jmp(jump.RelativeOffset);
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}
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}
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buffer = new byte[_stream.Length - _stream.Position];
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_stream.Read(buffer, 0, buffer.Length);
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codeStream.Write(buffer);
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return codeStream.ToArray();
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}
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}
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}
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} |