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Implement Fminnm_V & Fmls_Se & Smov
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6479c3e484
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@ -271,9 +271,11 @@ namespace ChocolArm64
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SetA64("000111100x1xxxxx010110xxxxxxxxxx", AInstEmit.Fmin_S, typeof(AOpCodeSimdReg));
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SetA64("0x0011101x1xxxxx111101xxxxxxxxxx", AInstEmit.Fmin_V, typeof(AOpCodeSimdReg));
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SetA64("000111100x1xxxxx011110xxxxxxxxxx", AInstEmit.Fminnm_S, typeof(AOpCodeSimdReg));
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SetA64("0x0011101x1xxxxx110001xxxxxxxxxx", AInstEmit.Fminnm_V, typeof(AOpCodeSimdReg));
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SetA64("010111111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Se, typeof(AOpCodeSimdRegElemF));
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SetA64("0>0011100<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmla_V, typeof(AOpCodeSimdReg));
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SetA64("0x0011111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Ve, typeof(AOpCodeSimdRegElemF));
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SetA64("010111111<<xxxxx0101x0xxxxxxxxxx", AInstEmit.Fmls_Se, typeof(AOpCodeSimdRegElemF));
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SetA64("0>0011101<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmls_V, typeof(AOpCodeSimdReg));
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SetA64("0x0011111<<xxxxx0101x0xxxxxxxxxx", AInstEmit.Fmls_Ve, typeof(AOpCodeSimdRegElemF));
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SetA64("000111100x100000010000xxxxxxxxxx", AInstEmit.Fmov_S, typeof(AOpCodeSimd));
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@ -371,6 +373,7 @@ namespace ChocolArm64
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SetA64("0x001110<<1xxxxx011011xxxxxxxxxx", AInstEmit.Smin_V, typeof(AOpCodeSimdReg));
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SetA64("0x001110<<1xxxxx101011xxxxxxxxxx", AInstEmit.Sminp_V, typeof(AOpCodeSimdReg));
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SetA64("0x001110<<1xxxxx100000xxxxxxxxxx", AInstEmit.Smlal_V, typeof(AOpCodeSimdReg));
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SetA64("0x001110000xxxxx001011xxxxxxxxxx", AInstEmit.Smov, typeof(AOpCodeSimdIns));
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SetA64("0x001110<<1xxxxx110000xxxxxxxxxx", AInstEmit.Smull_V, typeof(AOpCodeSimdReg));
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SetA64("01011110<<100001010010xxxxxxxxxx", AInstEmit.Sqxtn_S, typeof(AOpCodeSimd));
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SetA64("0x001110<<100001010010xxxxxxxxxx", AInstEmit.Sqxtn_V, typeof(AOpCodeSimd));
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@ -492,6 +492,11 @@ namespace ChocolArm64.Instruction
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{
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Fmin_S(Context);
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}
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public static void Fminnm_V(AILEmitterCtx Context)
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{
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Fmin_V(Context);
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}
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public static void Fmla_Se(AILEmitterCtx Context)
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{
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@ -519,6 +524,15 @@ namespace ChocolArm64.Instruction
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmls_Se(AILEmitterCtx Context)
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{
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EmitScalarTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmls_V(AILEmitterCtx Context)
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{
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@ -220,6 +220,15 @@ namespace ChocolArm64.Instruction
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{
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EmitVectorImmUnaryOp(Context, () => Context.Emit(OpCodes.Not));
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}
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public static void Smov(AILEmitterCtx Context)
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{
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AOpCodeSimdIns Op = (AOpCodeSimdIns)Context.CurrOp;
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EmitVectorExtractSx(Context, Op.Rn, Op.DstIndex, Op.Size);
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Context.EmitStintzr(Op.Rd);
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}
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public static void Tbl_V(AILEmitterCtx Context)
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{
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